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# 945 ux stepstone+germany English-speaking jobs in Baden-Württemberg

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[### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/9b51d2cd468e9b5f?ql=ql&sig=5f7c018059190b9fd6eaba6b138ba372c96d945c&e=Cf71JRvmFljjccd2ouP2-J_96kzdgLZF8gLnieIU3JWrLdr5eRmYe-iaqTZ3Tnos2Wqg3GiouVW2hqes2z1T5APUEXzutWc3sW3Ubwe_wtkq253MiJYbS0sBjN1BfJH4__z4oMRKUYYwMa7j7gvNYSKpWRnMy9vRzxpOHwESTrERXnI0ARg-8BUbM8zwNQMAEBGq8aBCTQyy-Idg9zb_bYmok6TqYCLBUOzY-dYBiNJqbP7W5y3z84_e6PlIM8zhid8uRQB2kwoZeBmRINhZPRvNv_nNLmb1Z2bfnZ7aqSBONwgZWH6oEWxb8XMrITTTd8ja5teG4CcD9TsmTmHEkt_vXyAmiStrjPJ5wyqEXzdglR5_IzGfUbGKoJ_8ER3GZI8C4Td-shEk4OuqLHJ7avkgfPp1xbGATWAU2P71_F1_ydbCwl03ceVkvYh04Oz18dC3I5sJzFCBw_Ls_-aYlngvZc7GIeThjym29t33d2_MDMYtah3zlvp2nxZ_rqBZBvSxUHk0e37oqn9_C1WGhk-V_GJ2Ze90Jhc7Q-fLJmhuTRWOYn3BDzPzNWoq-NZagD12NZ9k_mcqKVbz85Th79E9QbhLlrwfJ5x0Xj0-xz7Ra3xnI61lIRTGhdSx24prBEMlxzCkGnBUXizQP8cgUVbVUB8kToHwXJ8VVVowe63LpSD7hRM_zoed7jax1oR_8jq4KAmUCB1geW-V4tpshEchuNrlr-n0O09x2Op7f1ThjKE3VkB6wYh9PEdoYhtYzpNb_gb2FGly8Ks-7CYF7NCbNuu3aKjOr6n1PHPiQ3-BshRGIv-p3-MFGbJew_ss5mFzDOrZi9f7F-9nW0DH0-sOT6b-mZKxN_JpPcfZn8aRh-OHujQ3eD02woBRm2MgP3m5pq1_-8CPijYvgQAAu1LZjFShjonVFES3f4YGJ8Qv5qx5QXuxq66l9hmWqhSFaXdtWP4S_ToGQ5vpkNFwJwNRNix42ypyMe11zfWNVilryVobaf9L9kZc0er-rmmyeO-9D_AffyMGuIZRERkME70pnId204LTBqjA0dL-U5j8LU3qWT-vwhPNwFRE26UPXGwjmkaq0J8OE6ZckqFihNaDQXCTxUmidn3GmvIyH2STQoeY_4x16QWR-V1_UauVOcz0P5w0iV6sodfCUv68DLZo7NmM9sKiI_bev7Az1jn2UZgMxqCt38T-T29wS1kiDsTrsAxVS2aDF4nDt3EpGgNoi80k_YHHkS7CYxfEW64q09dFSDnoSKQyfm2xocFpsvKD4CMgPcG0Zch2_T7kjVr9x9fQ1DLrvBK4sBtfOmZbgnq63jiCbVyujMnmpBUrFecO8j81PNPYnO4p8Ij483_s49YV9Hpabv_-dlh0g2yLUiixYhI3xQSn_RpBZ1o5EldkJES-wF2MLProta87avvbkN-OWyZ4ir4OY6lZfxm839KtqHiUcW2WxCFY&prev=RQ485C7A4E90DAD4&p=1&pg=41)

* Advantest Europe GmbH
* Holzgerlingen
* October 8

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

report problem

[### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/51049fdc7ccaf42a?ql=ql&sig=6d1348a76c0a58551b8849fbf190d4cbf598a7a4&e=f8NjZvZe12AABMcW5S64bXlXoTJGspVUYzvZ0thKv4Kf9ZHvnt0O7Q6_pswEb5Xyptk77xS_NFOx7Q8QaJkT4wbJeukDyW0aocKc9NzPm5qFDkGVLM_85dmDmt0QjysjDtoEY91G9Tk6H5v0KclfvTykw9fdHJgOnKxU11WgLVjbFP9FYJWi-0Hgm4MLqqW4AnyvQK03Gd5iHyyyLTFxQHRXUxCWXw0qM7gF6kBhHl_sXuQI-CE7rQAOJhC6H4WTGhiWIGo0yNDj-JJEbzqvHKiOF4fLwxZ4cT98Mc165jbf-cmWAsSxZsvHxxonZMeGSNDOgZeQO6AouFh0gQ21NaLdqIFT4eKgzkSPGE26DyNVQVCIaeIxltOAQ2rQUI5ko1CWKm5WB5M4XzAUgEuWmeQfLnq9-5NNS2gg_KT_GeIGEPZWUI9ijZg3a_-tv591akqj0rgjE284SkkpJHIZtoUP9yM0meORV5dF1x2RHOSh6krKS53u3uKVRD702ZxZwX8Lf9ZRaBZ_ZfffMHAjOekJp3bpCVknz7gO5OfU-9orm2Uk5UYBMck4t9ljY9u-LFhv30mt7TpX3IAJXQcDSefBAPl0NygHAw0zfXyJh4KFIuLJzumVW2Ui60nvuqH5hmjwUNsTPoc-vRJjtq4711JhRmGdNScSl11BNKKRhsLFNDgExJ6NAxQVKLOnlButwJCbsVKY_1DczM9KwWodOjexDrWsho798LP1qYxdbD1PhNVETEbDHN8VDmDJrcUQDdV7_WTIDr_3tWB5Dx4slhkTQORVHn64so4akF2g1fOnQ3AHCRKpC2EAf_dFC5_WxtIP5WMPpJM6AV5H3YI9gUbjuAz2cwfK6TfAWtDGGwrGTImI4Kf8TtkB9YToEHJ54JsCNCXBjNzuN3i-OsYdjEByF64ZvTMVTMkYSHcr0jpy9NZfrlrdU9BROdi1JBouX3rUhVy0Zto-LQmnIDoyOyZwZ0cJoShGFTwTq7m3RtGPPlgFUVSs10lLcXMybtwa0BfSUc4bCaXWZO_qF468B3i935YhM2en93UytYZ-Dx0gSmJIT3XsP2OcxGz2266IkCj2G1WM3LhRGCrPa9RiIIYaCHQNr0yhXm6AaHo-sJ9Co4iUEOu_smrpn4AlwG75pZlFN30TtrJeDoNXXwcdbWiNen3S0ZCYsqIxXf8PWfEECgIlpTgLxJvJdP3aAMwV6HQZnXEqhTW9ioNbN_DI-255_Llqnad9cDPXlIrcw8kzExOSJ8MCspv2CDsAatLt9UZVjTmnWqfzSF2BP9DwS9gE0VfiQ9VL6sCXQ88LcxQtzm-APpSqwWsxqwaGsN6byEflF6eXOMfGaTOiaa38ag1vk8NbtL1qQS9pucwj-Z9pxhvhvObHCJzOKtP26yTZBbEM3bWBQaDUDfwfgwBws0oBy9hxwnpohrYce16XgOPFqG1FgPhOj-tmSi6ZaA&prev=RQ485C7A4E90DAD4&p=2&pg=41)

* Advantest Europe GmbH
* Schönaich
* October 8

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

report problem

[### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/112dc7a5c9055ea0?ql=ql&sig=8332a7bde9dbf8e819a3f683d1e757edd99438ed&e=GaxvTXeAk9hVCGmWDdy9LQ_yS__wBwQtN-BYMI_qPTvT5Gq9G_8q5AnwlCJbnDwQxHTPMNIid2Hp-JK5uAwIepKx3G-iP08LaPOvWMwAQyb0bEzg4OWPgqLkj4BxtB6I-my-ifBRKsiOgXfYKbJ5S6PWJSQqebenjhZa9Kgcj4kOh7xOLe_eNccv64QkPP3vkc9u9yz8HQf6jIYIS5ciGXLvml8bKYOpPnNq7YTbtCUFrY1dGC1biBo8QRdiGpgtH3AZFhKRV0CESpVSHHAaQHslDzSl59RklYlGJ69Sr1jRmwbsTcw2NRfquM6nNRDoBas5X1bayq5d5NkLyRE4JUBKgfjajzQHKcHe_tBtMNO-_OK8QfBN1Ez509Llx-Zkxmjz0d_fdDoQl0FE4IgEFhMBG0Kv0yl0a3iEMvH6WQblz6WLPhx_SuBQ0lZMQMDspq_4plvseGY8oPpW5g7_Uh_Bq4PK9Z4jPoqupfZNXIrEQefsKqLCIJWIXh5nYnXlsBEWf1sNJgPC94hNCTdbA8lrpPBXU1L3CcM_kpgzGrKLB3efYGxXnhjcGkALCQ0OMe4KfHt2_s4QImhuDGvJKzOtbJQSf7YKEzI0XETG5TJeJM6A7Q7wq9hIu06DEV7N_uA6uUnfuxqUFTZi2P0murN6rXjKboHYcK_q8Cl673RTkhHhR-kdPStw-bjKVXVK7DE6rxkI7lR-DzjpnrsEa5IDOrAOZBmkybJonYoTrTmbm0fHYhmAnx8pmPq2P2O7bZbv7uIHg-h6QwCXQ6nKZOnye3DiEYt2o8hwmt6PlSXa3NXbapAekRWGnEdHw42czX1iWipjTj3p8-l-gShAmcNL0OPnBH8Lp-d-lXsgz3s05MMtv5j-haghaq6A1w72JiAG2J1y_N1Fdgm-6wWYR4L192E6d3waqByJ4TvVXRpAjO7GHrCEs7Zfwr4nHn0ObwLTNf3DhO0DmY68q5BIgulTcM0gyj84IjmNFw95J5E54Xq-KVPnK7S7vwHTwh0J6NwkBahqCh9fBtIHvKUwXLpk7zuaXazJ98C5lUB9E-wQ86q75mSX_ZubhQ5irvDVdtfaI-Rmm7lDHSKM9BUJxcVpghc_0EiZTAuP5yCDuPFJHkvECJikPA-h_8oaWW-sEdXJQgoocvR0ZGY4iJoTnhd8hkpK-GbAPd5Qy1QrIupEDYI0LkBtmK2zDjnuOe5cUM88acFzbsP1N09Tm-8fvKYGhFctWrffdf327BpGlRHiQn-NpFxjDMIege3Ac9S1IRx4lD9SMoATrtd4-Gj7LOMFi3N92kc7l0VFxgS_mWn6SFZE0JQL3M7X8eBm4CBCotibZkS0n4nrbw1XJLDvZ-aR-GQ-6lC08UMnAiSA78xnn6wx9PDybToG3r0cS8ohyq8WRS3eAk6D0Y6JlbhAt1vDnr-swv2c4xN31O2crTTPGQETASfk1pA&prev=RQ485C7A4E90DAD4&p=3&pg=41)

* Advantest Europe GmbH
* Ehningen
* October 8

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

report problem

[### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/3133141fa13d2fe6?ql=ql&sig=2a98f9eb86cebe0b4475ca22fc09992848c013dc&e=2mCvftUs3FVYjSfB_4d9UCagKoBonUAGeh7fZdHal6yDKiAKC0mhWi-lIsxmqQyIDcCTl2mNuP10IIFjl82AtQN45c1jaiVo8X0-Vx1xnyliANvv8gCGZzKz_DUPtUAdtl6_58qP-CvCKGA-2CELH4hWj4glxG-_YZIirxi-94isfQrprZqWhOeY2ZSRD8s8A9YkQGXKUzfcPs0g81Qi4WR19ALaFsvXsBlYWisIGADW9tj2VNltUmyJ0kiHIJL4-is2DaBUrWaEBdOgUdeNpT6vbA_O4iQBzTxKUG9rNP2tlnrXP9wK0auRsJc0CC-glPNxOEvLndqb0_Rt4Dk9AT3gxgJqW7_qJteVbyO9Knl4twLRetcz7nmHvdZ3UwhrSJEQ5H3wIkDgubh260naCATsQUSPePC8Q0Vife7qfFhEoptRBO7n9nntuDGZrq1IraQCbG_S26ADpyLBU96JiFMdODGF_dSb-fW4On0sVZXJ-x0Lhh-rEzKwnv7sRBioWpbw9XW9KXK9fo1maei1P2jPqYNJYJSIrXN__EtcCSP2ZAxEJSz2c2iVcHaPT8R1mH0Gb0BM35KAkxL4BynoU7ws9j9jyR0oQSFZxLRkBjMGR1BfFsouwnX9zKI-H5WPAY96hpJuDDRynX7F2i6fxg79SZk4pJcOA7yKhmnXX2x9aO4xFgmjQPEiZBaF1UCtq26rcfBm_RFxPK-NTtPKFsJ_InAwvkUXngIsWoW-o2IMlue9GAjs49fwW6OfEKWH2x2UhVjjJYQFA_C70PJhGuEsBVBZvumeEnZ2am6fElls37QmHoetKNDUU_ge1YvDbhZ1fsqtVjjMIQkqaZSywqZU2yUC7mZBx0TWc-sBD1_d_r5x1JOFoRTvH94StHnRsX-9_OJ9WuIOnbV4MtATzy7wO62ElU6hl9y1_hpPAq8zBsAsqVkknXE7EJqTz2d5l_3B6x2lGkeJ-N6J3jl07FZVawbcGOIEdO9wyquGW98CQwKUeN-LgtlP-zmRwxTLRaEaq-dgg7ioSzcO8ZZ4Xy7betnzVr3gQJnKzE3o6LwHeFtKWt9i_8YO_5K9ltRCLwy7KvNNryIS5-mPsWyFGkoxgf2hFPKxLqlcMM2iC22a9Sjdn9mE0waRkeOh77nDpTqZx2dgi9Zg2ubP8-mFOA5dekeO7_VKN4a9bQy8tvc4nMAhe50jK7VptkwhYbn4LM5wqceMP1nzQ1qGzAwJvjZG0Lzjoy7hn41d426cH2zm6R2v1d8tgnwo2Wl7WhutIXDyvkr5HkoIPNGzDeXz0a6-LKzVhstt2ehFR8aClmG9BTQbrcYpDIm5JVxIYz_tL2J_b9uWurKR7Fg0tI_WqlDizBRLjK-o5Ilx9lfvRychyBgG6RanvMwg3Pq-m8nQi9tsaOigux9-KYXimH1vPTxPR-7valLXzoBZANMWn-lMy4ZVPRobDbgN7bs&prev=RQ485C7A4E90DAD4&p=4&pg=41)

* Advantest Europe GmbH
* Sindelfingen
* October 8

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

report problem

[### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/b9cedc249d51b8c6?ql=ql&sig=c24cd0676339809dd66d90876170aa58b80ee29d&e=iOBXuTowXGvBgXgTE80_El52P7T2v8IwMTz3bKVmbyWuCP4sOKGdrSVpSBOsnX92L5KuLlZ4o-7Pe5L3Ds3bECx2_w9bHjMW_CMjE7Yf8c8Peuh_zx_sJR6jjh3-TkLzrjXLk6Kk857SIBdwa4LfQlwUUNTVOV-nLZ5kvhn2Tn3orus-w3rxsd4xuVYOivF6ioFhQPI6gv4zdlCNlSEOdBth6KMFPBkV2iGnY-K-g1mhbYzVIY1rCAe6kxbhzsB3-3OZKmDnhS_9YwqBodNv26tj9ILlEoHsCK4IIvrt84eHzSYVTlRZ5-lF5-bH5sR20yL_hYX124m6LQtf110ghNW-7tL07lGf1VcJXRMxvcu5I_gL2cqoPt52YJTl2Kt2SPHjanbGPTyfxk59ckQ27jYjpOsaDODnoyic0lkkydWaA8XLJunQ72oPRXcooEuKYWEXJHGCyG7Tckwfca6LK-TwdUDOQQKKsYp00IYKQMtumO6v9YNyIXHdjD1aPop6lW9QZjys8qocRPrp8_FsXMnfUEVxatBeSE-ff1u3UxkeycL8FXbx050urQqa8YuWhUn17HqDPX5PeOOrojWXsBf4sKAOWZlxmIWBFqf7pMjwayf6XZR46w8TDDXCaJ09Z7Fy25kUBh7UFET1P1gXfbf0O9dRuDwxZRLIGOLIfTloYZ42DwvqXjjRFqei1t4Dpih8gcFoK1vhouCb3FFv-1peopjLyfCC_yBftUCif679z6kBnB4pTnIe3bUYCmDcWGL4LZ6RrhRmztmQ8sSChM45CNJJA0sz_P5JBKG0XlMfPrQCjo3u55J-9bPWTZyyaHNyLEKeM_1hx9Dh1Ron8huh476RkDHLSsTRKy-Cgv0IK2e7FMHJmiaq-qgmx9o3MjWXL00eckAaSTisIEr1BCbkNhRIGHHwo1gGA7_0KX7MXETCONtqFtUcHbK1l5rPa7zOJZdMwjdJxZwFFsn4wnN0LVkTKbCkiJrVnilWXNf7-O0PsuKps2ZWEr4rRPDNVlDcO4CY_QPWjaBI--Di88SA9CznTU9GyvLBBMC2_zSy4XdCgM7PAnyueqwg6_fxQASt15mDqHLVc5vZmvrkDJzsMV1i9fZ_EX8Xt-x6D2jEKZKxtLKQW8hcQWypSZ0IEWlmdTOuVZVrTDbl9gIz4d0tcks6MFMU88jVDlQQXkuFxbZgRHfXlvbcvEgoVfM-9QGqeTt7gYucIlYg_SWiVdoOkR8SGWwrQ0FRv7FNwtCArMpV_9qvaCZgtIbYHKfOwy_N9-w45SydE4dV3BFdUEzM9nCOqEbkcJwGdtvGqsRx1dwM1pWZ0PqEvzL0-AkgMOqmnvGi0kcCn3N4GRWo_vJIyMplOg7QvzvisCEkepMZUSBMJ3LovQVuD8QkNaEZRM7K5Xo0Q_-_Ytskvy3xcX-shR9TKiS1LLG1fv-p1NO1B0N1moB1eoFW8Jvgzs2VprBlTq3Y&prev=RQ485C7A4E90DAD4&p=5&pg=41)

* Advantest Europe GmbH
* Sindelfingen
* October 8
* part-time

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

report problem

[### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/a5dd1c7613bac93e?ql=ql&sig=106d720720324fe0cc5b8312a04e56c7a49796d6&e=kCCbm0wjkbfGEi9w2-N7LzCOTIobPFsfzeRt4g4n2Y2fu8vA-G-kt27Qi1sL1Qd-X5RukkVABJb1TVGpj8XX9u-f0RLK1gXieEv7XjVFAiXq_V7kBVaK7Ru4uLz0JWOSAJSNKBnXeSiZsg3OBKJ_qFM1Zi0o_o27v0CjZeOT3ld7W4ku3auW0mXiFLPEYSVQ2e3g8LkIcYK_92osQ91emuojAS6_dtCsZPxFI-vftYeFATtAHiqia74-K56FzJTBqWbO2hNoqS9jrsepb6n8yNqCjQsLUX42UrinHf_LE6TB6Nuvt7CmoE-H9Hc5pL5-_U3xu9ya9oTjjKSRBUEVfwywBCEutZkSpz-TCHCui-Wb5idZ77R1IkGuEDE1dmI6BIATNm3ZOvBjHLGjQWSZEgkiV1vUP00NQPFeS3XQHSpMWFy5O_cFnyVTHgSeIJb5xzrMhSrVOcpsm6cFQ1GbaV--XF6af_69T3yCQYxkCD5xrpwZONkJd-7jM9h4w73Ynqd1DXlSbZO3DTHG67lft4bLgkojtvt7MekXf0QFsUaBWVJP32OohD1nXI0j1yNmRCoWCjkVBgMzR736Yw1HwxOBJkbpTUxnSqNqc_Z-8ijcUPHQ1ZX4d2ycr-w1V9wn6B_bp4UpqCpB48Vrc6yl5ADU8c8-oI6H0gS8jlKsx0QW4cJGE1H47M4wmq-Fe3Y2vPoDxcJA6p6scGO9pCp6TVEt1O0uoMcQA_CQg3UcNxevtdZKe1bpKwz_pX-0VYxt4wmGNzOUl59pbh73y8Nm-1NqAKbGxq8A_gFujvzYpp6oYx6tt4lzl6e3ZTaB8w3mNII_DCuAOcZi9P4Msw6n1IvsA03g1K5Bjrv0CeHQDRxbAnjv2QHB3hT_fgAg_IjPi535o6AQ8u6Q8SJQeuVngsPhC9LaCDI4ZEbCpRydQ6fGBQupBV6CA3R8rhyYDnMFaMoTN8zPt4pgnXF5wnZ_ZrVuA-uZr_MT0pcZRZKzqaWuZb3FB93NHEI2bpsg7wk-50yLlqzVLD6-eFL0hHfgS4-TefgxQkhFD0Vr5SXGjgmuK0EDwgP3w4R5sVNRaUop_YPs1DPEV9K5t4zQGcTmu7SDjl10DMliSgbTALz0yBy1BbFpKQi2sHuUmrsZjwKpkn1RBPuiG_8SiY8s6dRTE_0r4syUytDjbSCKAbeH2I_ahsb8jkKpHbM0mrGFBs9XH3LWe1JyU854Sw2xMlbUBXD4V0afTh-PrIqXf_BoArYVJ4OsD4Y2H5E6T-5i6DY6oBaT04WVUeqdeuNoKJK7Uv3Gw0H7_909ot0K8nc_06gpKDanyemAB9WCa9-UqhxYQU5lT8rlPkm6LBqXcsj1lNQ2e5K7gk6F8ryrN1dpzIOGot1TZLwh9F5_jiKn1AU5d0usz3MCvXAEAA6D-PiQfRxs90LeHqQvaM_Of4O7DpEIH024X2tIdpeuYMbOWL-RJvzQIrt7crn3&prev=RQ485C7A4E90DAD4&p=6&pg=41)

* Advantest Europe GmbH
* Schönaich
* October 8
* part-time

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

report problem

[### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/ccde26239327d972?ql=ql&sig=4d2a54ebc02b1d1e9aeb5f50ed75500650d2c5b8&e=-IUiD5EFfC90gXFEBMaj7kns9UIYg4ueFdgMiACxSjCUC-eUeLwEqGP4D4bnNbsblxHCi4jbnLKUFOE8mF53VkhQwuEsMSs0mo8S9cYI5gp5kSlo7INNTEs9hK2_otyWUUwTPlg693OV56jitvK_DzOHTyove4rqiOO9mK--NmEIij1Fn6SWjUXr8s7Qsc-YQJPELzaUJUamwF1cgJi3ZkiAwP8BiFLY_Zdj1dPxJMF6ivvfM1pZZIkFOPOkpQ_wb4EqH3lZUFllNKy_-7xYq4m1U9SydEJm5Xu_TE650KRd0qhQaPr9kT_klw4V1J55cGlmINMjczGhJ1DxRNvBeepmHoK-DDZnlvqLWKzqbwOOjChsWj9zNu02Q83DmXszsGrb8Axy3Is8XRp-0dP9_wzqJBfLkSyY5WrIjuZki7ShtxLNsVccqKhTdKTOQ02gPJWJZsI-5uM8ocYzH6s4NxrZxEb9r2QWPOZiQU_nHzFENRAb5YfzmTbvqxmd6njK_RSP270FiE-l-fIqPTr1YwvLkE1BOvPw8_i1QWQ8KEzmScEPdpUp4WQ3G1x9t3C9nC7OrzjjM9Gr0NAHzd35P3xtdvGKcQEyLs_u2gNesTEyCWRWP-hm2H2MCrUZ6g4U3RnKaFxwZixx4aDqLD4pgzgVJ7lLXIeeH-iCXKqW0js4mLiIyNsLbcKS_XFb8GZcQ46-IOv--aRD80YyoUw1lLOr4JSYKJt1sqgheX0PiBT1p49x_HNZ4GaDqHJxixlZYzst3GD6B_lGy61lUI8ODyEyR1CR1mAxHK4gB4MMeSrOzdf_xCRZZ9K_Ev5mZ2Lgcy8LbJD6IYlKBN7-Q-XHvbSf8dW6mMIfFdKdboOxA4S19g0lHFByvmI-WXhGZwq0xBWP6GerLkuanke-sJbpeQyWshIXLzuEJcIH5kRBxBHmQKf_KZ2gypC7QthGfSjoMcpy7yKMXj9gdjAm0RYHOCTR7QXmK0F9S2fkf5l2eK8Xg7ZUc2aDw-XoiPMYoyeC5ZL3S7CrOg99v_6Kcg-tqyDKDxYd-ODiwsPu7OH5nogntJSHtmVbXZ7_hgkYFkPDWVRYv6nogMcPpwU5JalGZPQfshx5HoWNrS5OvDIBSH4MQCiNNllRg56nVNUckbGoA491qBoHwCJKgDMiM1iw4XHEoofy9MxKg-lI6sutsKbkEM7uTN3CwpbDdBiRExoXVpEhKT5QNJTrnXkX0_ZgFgMoTeCZS6NGiuaXH_PyK4GSupPdgmBqv3eFLW7CoTDqtd6rvPBLOTMd4OWaJMxtClpTVdwRQy8oFeI1eENgsLjrcSx-gvY0fKIkXqpDQ536zLyz_8i84uXxDBGSUoKMhbl-tUO7qc_1XoCR7CpVXSAH6945KV7hmr88BJ44UwKAhIONE0BkjVi9tb_4d-T4n7eseXDw4NMpL8Rb0fFy6dszVSKabV13vlhWbfZPbOViepwC&prev=RQ485C7A4E90DAD4&p=7&pg=41)

* Advantest Europe GmbH
* Ehningen
* October 8
* part-time

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

report problem

[### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/36fb260569409809?ql=ql&sig=17de7f53d6fa0def7931b00bc52046a34b412cc9&e=stsBdeJC6WvZnXtQ9E-0fEhTfA_hvC04gt0-oLMfoqo0sEKbXkGG13PGNCNFPRKZtExd_S8Hm7kRXyuF_lBCWsTkbVqvfehZdj2shBN0oZBhswuzMyYBmvtE94PoYWlXGPN4eyUyVQ50k3Efvrq4rF-eS9Eothc_dsgNPkomwRWNNjBOGUrqIsA75e4tTqUR6xX70M_2Xqh0qNmhq9fweaFQ-5L8n0ygcz9WdvrDdWg4HeIAiK22PJWppA45DZPQ6IAtjU8LLyl0fAdHtwZvv1yC2GlcRdeN6eD9QQ68Dw5Sb5prxorU5oxUQxP8T4VJCwTlb5EcCc1zJKIzVe1DRvNCXfRbHOCpDqfBb4h9aB0jy1tJsJsmbsemBMZYY7UvYW2cggLiuCZ9sw7beVF2Y8HPndDK4peQc4qA1W6GNgQFCgVYRUodFTFmYUOxUAFE_qnqzcYcCHRMN2mzCCChAlxs1ed0DCgkAxbv30h9oQBOxXQzC23Fqd6x3vIcuRTM2oBk_gfOchdOvV7cCR9qWHQ5MRTI5XQ8kN3U4g-WDywMQ-7holoAYCeAPsUFmzbKm1WCIdZInqFPmtMU5bWn4NUZ-VahC2Bh2tT0coqFa__C7nXyLtkp211sGHLrHHYqhIh1_tCF7cmuWMW_-pWDyTkjWaF_7hetwNwHYzjzWAstThjqEZYmn_X_QMP8UWojEbQNmw3SPpFSqJ0I_rg87uZCl3eJlL7-3SXwqqdHDz__L2wHmUhEhZs96WKqzxm5MsP6aBTepUUe5BlSmA4_UrbE_8fSxMJBDx8vE2__oWY70U7De3Ls7_n8bjdIj2RgxSqJaZfqHGPeoM4ZzMQR9PAyzmnlxnBVMEbQ7ngYq9uIqVZxW4_U61i-VZMrK7sqFOkmWcmzCZvgA7Yji7v457ltNbC_0fU1t_eqgjsBN_EfzaEJ5RDkBjN-xZX_xYUagdlg6ouu3x2CyuHWFpxk-kHrY7JUh7N2uhZkBm0qxcZ2VYMD4GoYRN4EhyQFaALjrNunWoj6sD1M36ZPP_VRqrYmEzmHUAwd-1r4P9sSvX7uudh57wNlAltAD8NczYIm2bha8K_uJ0R3b74jXbODUorTdHHy7QsyRIeWAQorPURWgZ5Jj_FLto0HmjHuJhs4bzDu0ZldxBIfvNMeQ1N4y2-AgCuj2__ExSulu35H69ZVwc4FvFTwqS-sD-EDRktsO0sE7OMkWTLmuGwMkGPY2BiQs_dADPTZEP2gjJuCIRcXGzPNcxWaMRJdjuRfeiWWtgf9L56_YNcmzjH69zUHzrAnnfrDeL-CzSSZRWOlioBkUr2FzNQxrUySgVOCq21ji5CDbOl48WFCnruXsNtBEhCqW604GRpbZJLTLUMYAUv5eGn8KxP8bfc9txK6dbhZmiJEZ4PUko7XlcO8PkKWlSFFUv1HRXtIrmMFctVkxZW2poShSwMYz6H93FdC7LxxIMRW2jy6Eg&prev=RQ485C7A4E90DAD4&p=8&pg=41)

* Advantest Europe GmbH
* Holzgerlingen
* October 8
* part-time

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

report problem

[### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/04d81c2684a65c35?ql=ql&sig=791453d78a8b342e667363932c062051265b85a5&e=5crsXws4mfyNuguSPWQnDLLMkelJqVFD5J6a9ZDNEBbqEwOqs_bSun4AqLciF2dC0zplqSlGSrGasEe2f3-37lN09bU3RII4BSE_bd9ZQfyVFNLvn3sFYG8gjpPbpYeRlOLhqfXnbXXfBC_CtUsxqBGCkPyaGiIaw7oR8ILD72Vb9-O-WVTwu6ziZNG1ze6dB01Bc1ltpIok-lkWCLOCzR67CsjvX9XQTPAbnOHWc6SMw7Myh1iYW47Cng-egnQfo-qdmpz-kxo_M55kt3ocQcXCuOdWKJaUuSdXfsU966MvOVMQeBZ4lyzoRqNE8OtgW-zjn8DGNZjD52aYtp90sk_5oHcOs8hWipzvD8SZcbmj25amFDWpz7NbLIMxcpJuLk5gO3UE0t2AHYINaNNXoAOJzV52_ku_ZwxXi4XU9hsnQEkpnymi8iCXIeVsi8HWyMrs9n8uDDXESr9mlsSecTaq2WkRXXNjDAPvGBA6EB8Y347k5csOLcCUhOMDLEygh5SNz_0pyvJXSRUEUIn6j0F9S1gFP0UCITeuPnjZPxbBK7KivJNGTylHG9_WJkDbudlAocGuxrqouG9IoLEy3mn8hOKuDzewmb-7X0EYKz6RPiSZnLAiKh96MrG8fDG2aqJJcqZzQNyig3zXsjmIcDzcpNPt5MIBLrXZzYz64mNXec-UrvjmIN6e1hQAZ2wN-yGuKlGalgbMmV1lh3SAXsd7fxP1cqEznVdejbLgqgvdU4vJPHSBNJtTuMsS0MUHyNF4LhlTFLzZz8dK4pWlhH4y73o_nMfYmNpqQshE-ZO2mQGfR4jMlc8WGVEshyRD-hGeCcvd5Yg3PMAJ6TTkRM6N7YY8XyWgGryfTH50DBZN_gCsf2EZWC6me5v6QStjcU9Lyqg1NemUeubxDY6vM5TomifJbjXAGu8RMhejNoYIXSy7liynNekaBLfwR0I65WwfLcvr3MqRjTEgLinh6Wdz6ZZvmAogPgO5SjxQTThPxkL5RUNFTxFjanS7yz43Djt0cfFoduqLHIn5DkLxaplHK6CIcERwflv_SQ3120C8ek_FXft5gR_bbDcj1FihT4Z4mOF9_kRa0cS-TGNk8v4N0ig2u7iDz2U4Go2ojuaLPjfugeALngUNAgM8w8PnSqjV-K8eUR6Rr5IUWQfA6Xr8ZKqN9hNga2lr0mPN3hxCAIAKl-2SHK2h0AFhKDkA8ltXcPl3tme_qhBvquyxHKXsUNN35Oq2V-38MjYURMBBXY_7grnG2RxZeecAx_5COcoFAx7F1zAfANIqwLx-AjfSoFhYiZWOlPVZqAXwY7193FSVAnJY0p-Urf4ifQaD4mwScSEzvRN0QBxvX72zi6bR7Oc8sW_WCIExzRroJaaLP4lS6vPaodlikuQqe_LccZd-p-nleSC_OOEXHEb5pnqOJZBQRXjbYPMIgsuqpoXj5a2EeSYXr3fYafIhh5y7VEVG&prev=RQ485C7A4E90DAD4&p=9&pg=41)

* Advantest Europe GmbH
* Magstadt
* October 8
* part-time

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

report problem

[### Warehouse Worker](/clickout/2697e106f7c541e5?ql=ql&sig=fea047db4c9dc8a8b48200e8ab1af80e0c76812f&e=o_MOYJefzEZQwX8N5nrMC-U9-ZBrhEnVtUXzIAJpjBHeDH-ne_vSoFrNqDvxGm71qqeTQTsmTRJt8sBhVAA24OZ9OHVAmic43RukiPALp-IQpMP9Ea6KAF-W_bF6SsCad8XQ6KjCeXQH9yZAO2cBCZkdpoi8l-oHLYD5UcbACyM4vTxetaVBmsPKvmCrQgnGFf9cVkq-3d6m0YnSJofsL8bZA9AQWJuntz8IupCnQTOqax_3IEX5J6v2qFXTGqT7MI2IQ6Zsu9nSp10Jw3Wja6VinE6_jkCYcgkFH0dD95foxjd101GJSsgDjnPaLghma2ELRoTAv7NkFoNhgCIBoydS7zFt_4yi0mj9XuSGWYME6N2kA00gx21kbfwZqBMem-sdFN6M-VQdOR-kJCtIBo6IRdOM7KGsVq-V141LdpJqRh4ofrZk62f7EnflGbNU2KcG2bzO8A1mY3aYfiDAyX1Cf8ioOqOf72EanYtHWGEehrAoi_sPLnrUe7C_khqHxEKjR86fXYGSu8WTurXuJuk64Y_pXPiahYhzwJto9SO63D0BjfYlGDBwOWzmllHOt48do1IwvvWv353VIUizzcXMsCBti9Zlc8V7o97rSbi4B_1yj56Ob5CJNhNnOGuthk5di3-z7ZoX9lxfoeQi8gjCvxoXUwv9txMGdpY8qcQt1oTuXeEyI6UYsjigyBVjs1W__pNX11oVetxH7HSWz501lx2c48YWCBos2BpXE4OvPRgOLN44o07Ee4-e0KL_0er9dLqWWoNsx7aWVGM2VDYnJ1Yg37Pemb-BrTi37loNV6H_tqV7e71un2hmBG1GfhE1yxBnTGBVCUZ885fGin5vQH5D70Lps2LdZIFd2JPqsMh66HSsnLHbgoy-O5WBwuD-Xqz2ncf7CGQsauUNFiF9ktKosuqdaV1FqPE2DWxn0JKEjPhe9lr3qhceikE7Qh-nqCI9CzXREKeROwG3F-XR_WxgaVDJ8gJ6TzN-_gG4ydXtqLKU3piHGAVrF1Jqzm15xci9RxM_Wvk4MAO1keJo0u08XQ5XDJtB9erlYNjzGV8b__Gy2AQy6d4hi47EFPFbwkpv1pkwmIyrd_ASIYpgaVg2FnaQJ2mJT0dRWMJaa5YyMgNu94oYJ9X0h6wrUz1ordbdBC7DGsa4G2KINb53CkWTHsq8VKrjhOo9XaVi-rkGHol_BHF0leq70WisJgfv5Tp5YwnRnk5PsWGjZLnyMqfzGCH2s7GM5kzY-eElWDrYFuwKAys4F5JnvpyozHfFd5OXwuRzJox1i58tyZcXCAjJ36YHG3-hr79VXkrw_jBjLEpqMDUbC7jk2uxj9YVmim9-zLwc0l83Mlui51lXcNTFVhXRwc80de0HrvX-qql4CzFFh4jNaZ41PDY3jC3CzHIcqYAP7TQzDJqPbkjCa-5a4tPpag&prev=RQ485C7A4E90DAD4&p=10&pg=41)

* Amazon
* Buchheim
* October 7
* part-time
* no experience
* warehouse

Warehouse Worker role requires unloading, lifting, scanning, and sorting products. Candidates must be 18+, comfortable standing/walking for long periods, and proficient in German and/or English/Arabic.

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[### Warehouse Staff (m/f/d)](/clickout/7062907bb0214916?ql=ql&sig=cd0e9c129d8f13aeade807911c56cc66b0100f57&e=fULSYoMSUxOj705pRTNbzQM9XoMgwGnin0YXeusL7KsnPdY7eGN9qzgLMud3RxH1VMF9olr0chEEWLzhyVuam_3ScOJvBjzrCroZiakOVUvP8Ji2hvQnV4rBK3wn7LD193xBBpDz_nSBS5tT1xCQ3dX_hZTbBT7ewEojyZjs8X1xpojRtR17aMHytnHVozk7dn6gCEBHLfE89r7jQ42dUKrFdwNUrRmylJ487np9PPo1TskP00CJqR4WNOmw8P--7rmsMw_a7FnJWvj2fp_5cR4-X3FyNvGEvEPEEkR9ppCWFrsix2D39pIcViO3sI-reqe-ymtV3j2ATZZ81tEtTcGZYwWwl3LySwkLsP_m7EgqTptCmjAOBwIpmzQdOTv5gMw67_CsiKxWvGtDskI3opw3WoCgL9k_J0X5OHidM8_lcU94dXt2tBxhZprPPoN6R2jqqi9sqs9Ll3LW1WeI268BpjaHIlMcH3gInmgZjsWjBpZdmUjSiKfKuEWzRUSt0wMdKCsAvNoQJmYE5ASHmfnn5ME3P27UHplD1CEp7fWgtf8FQtxA3rqI5NBW_lSy6lxsZINS3GkR0ED9xmq0fkicKrodA0hGCEqj-orIpfq-36Ce5JhxXqL1eZwSlNvmXHfxoFwiL6zFC-YBLseYfMhxH-X37qTDT7G0AWhxD37i-rl2w2cfnJbspmr5KowldI-rni-AYIsqZaySF9mb8d6tOaqG4gxzTJAQCfY2ZVsTcBN3a8PDTu0DSMoEfK6r0Skcl6cFETa0IZdafIHvmsVPFFwl7czG1daEeUqNT_U6cRzil6fFqpKEj3029xgZ_ty5nlGmr1927Y21lKA6d1xnIdy2BRl2u654_Lvif_0lofakw6M-oHTn--IxGBzmBWJsMRaHh1n9ChpCTjgdNiaSrA7zyL3-6h7yA3fCEG79Lh8EmFTufVfm9wG-pwC9SPcAyC9ihZX9SepYtlmgxp3oW0Q0i5XcF3-Smpg5Q7l2sPRo5WiHWqJ4NE-MDIOl6qNEhH_M0CL-YakJ6paokGer0T6g9PvidR1Iz0gfljDj5FfhNdou2SMvT1-5_ra_Y5gOFC8oM2YQm_Nvt44rHmMfO4_IRsjI8tqwpGXl5o-5HhMZtIC2qchE3GBFZn-3An4pLXpgnioMNphv-eDSX_tthbHdex4eqxQmWXmLx8WmsEFhHCNlwLZXh7jL46Q2poXtrtREOgK0mabkDSIm81MNtT96ImtmRBdHyobLr2r0y9lXvvedKPMRN9cX-UlyeKdWE5JQRwv37ds8cbqU0kselmM0cgd_UKuu3fcHDCa77IpUBwOIOGRDnPEBsqW5IdPsRgQ0TIjrLN2i3TN5bap3VV8m9qLLEz71mGq9QsnIc9f42tg4UTBN77cfBaD8EuEiUAjEiNHroyTVMUqztJ44MkK_DPJTZLlUYao6hWgZ_AsCefbIHu3iLoUlKorw-tSsQW99u413&prev=RQ485C7A4E90DAD4&p=11&pg=41)

* Amazon
* Wald
* October 7
* part-time
* no experience
* warehouse

Amazon Warehouse Staff role requires unloading, lifting, scanning, and sorting products. Candidates must be 18+, comfortable standing for long periods, and proficient in basic German or English.

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[### Revenue Operations Lead (f/m/d)](/clickout/5945412c9e6bbb82?ql=ql&sig=6399f87ad40c46385b846df662deae4ca933dc4b&e=oA6LiodCwl0GdsBYcOAzzVXN1lbz_NdtpAXotzflbleY3GWjacz2xueWzLRnqq1PSAz0qIwPQGWS9wG1NtoKLRdkMOOeuaB0Hw2uwaxF8kJdZWg1eib7wvXNOulHp5rAHK3ChaL53weLE6ZkffcCHodCLOt1977mj9aqMsAfuwpTrZFxSBWvqjnIXckiYr7SKG_mhZqs0yNRuKd6Z3j2NbUM7pxyQdLdULuKykmX3T6s2RElxKyQr3T1kPzjRCsZXPSRB2Puahxh1nPoMuWW3YlUCgKZt3qMY8rnGPmgfpYGz7Vq91orCqPiovQZXX08w-dciki35w3POm3LkdhMzXMhAsUy4BcY30ehOthc0ZNLTpcppSkOt7lOuNHLocfikx5yO4aKh-Lj_idjIlNBtnjCkxWRQ5OkI2wn0aFjAxr0vMxnQ9v-MSV2WmS8AgIAOoP1oJ7ZgRNiz76TKbq3ZkjJv-bhdrud2txVcR_QB5s9iEH3UynA3T1dyUV5oGsg2e5Bar2yC77bSsZj8vrtKZDVIgl7wzSWYamyi_h6lgrTrtRanpOe3e3YyCstM03_5QUO4iGvwuHq4n5t8gd5-jjuerNqGj26Mmxjc4wBbLALGoZJ4OTsamswRn7yPdA_ZLitBDZe06M2ds7Bv1ksWwUlnDqWwfbFeWniJWVM04Br_u5W7FwS3j9yvwpj8sahZeIOJXSjZ_XD_P-TxuUKaErnen0_94CGJAAb6mP8xB7hcI4b496bwU2oio22fM4XOFHrlHvT0ecYEKRClG_iStxN1qnWBOsa8d5DFDMacz6ON1K4HVbwINihl7qZHPLyqeuDqRBcL9ieZ-k8ZxHdYj8k0rBSP27DJV3sUmiiol-X36vHArIIp_r6mWPX9FAeyzXcDvjeNucJi7dlHhgJ1RVV1p0HDj3p_IIiXEXew3mVmJAe551ixakUfpJhRGOoF5wL3OOKT_W44_e8Av0QRU9j0jhxQNzZtY6e5lflOxy5BWl4NFJUCGX9nufSlPm8jxnvcsxL2FKiZjEl4nI6cRp9Joez3LqyrDyfwfiy_0UX7W1EFwqbPVQNNNc1U7NcL26uhK56H6Le8GHD1QOgsEQ6PuaiOUL_TazDY6FRwsif-4hHiEYn2u9jaYEXjjMSXIQd5IutLACYjld-cozR2OiVdUsBFuAZReDxWpeXLTxL5LsA2TgykDa9NkJiAA5P15v1JVxPdJJKIr0KI7yDDUfm0oLqMICyZLmca0arGmd_34mtpWmLsTTXpIwMXNm7mvsZ05yolol-CqQzDA07R-KlBOjNnjHbZtgeSa-SNOZDG9MgTsFLkB40NJQN7B_Uotw1xAsDoLLDpaxWARY0Tvnup2RDDaoSL35PDUMKDeI90hjtql3J64HqVaVi13dF_BAYGrHl9-tMSrO_tIORkF5Ngk-etH9V8Hc&prev=RQ485C7A4E90DAD4&p=12&pg=41)

* MARKT-PILOT
* Stuttgart
* October 7

Drive revenue growth as Revenue Operations Lead by optimizing processes, aligning cross-functional teams, and analyzing data. Requires 5+ years in Sales or Revenue Operations, SaaS model knowledge, and strong analytical skills.

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[### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/375eaa5b3ccabde9?ql=ql&sig=a05a22c4d9d9410476710eafe2185e32b8699f9e&e=gId5gcQ-gIrrQ1jnDhA9zo_JyCdGhXklcUZakhTGg4se2Lq9MnTXJfjZScWdb7vfXtkVx5bZ4tiZKKfQUub2RrlVF6saeyyhNDWUaGjIUINy2JUCLGTf2Jy2t30ql7r4K4sUv5W8nJZQkHsBTJSgECYEfPUBFjLgZ1PmsZFFpNFVTwre1ah5Ea-zkLckp63RGAwCKJit2M2JG6qY3pcZrPoMg8IDpZKr1OSYJmDB6bk26_8uOEoyhNgaE28DexyMKXJGTGwXd_eJgmsE8MjQJuq5HH6g4-ul6pWf_3nm5k2GDCaBgvxABL-wKePQ4xuNE43215R38Do9QXdmSXOZtj0_j1VStyWp69-WAIfPvA8tgWwN4rA9iTr3q_bvfYsBcH0U4YHdNKWwtfm1NF2yIF1B_XKEP04nbynEudYTyOFjUeF40QR6FNJvIC-ICXqvLNfliAzcCDjceXJBe0XBICj5i_pqj5oKdSNbwYTQnyVjAsmazbLlZxLZcMUcv6bcraW0QBsXZLg16PhgDPf_qnCadJbQ47ebcVtDc9p2MxlzUWxhspgSCs65g2jhJpdWGO6ThPsEu-9g1GBDYzRr09HVgCB4_sTBByjbJ9485cPXNfqs7oSSQeGAp3WV3-_nVgH8FAeG5rueAEufpg9x3lrR0spLjxGQyARpz9FPWzcILHfzymzbkN4y2Tsm9Q2EIAOegAoqz1NfiKkEKnoJZFyuODOfkTgsgRTWejpnZg6DrcbutXAve1L1dzdzsBa0s9UGeN8OStbStx1pSQGw-XpZwQ19Xiy-xEtSkxTNdS9Jj3LcCV3-jmE5_cmezzJ2dVhAuDqgOfJJoDHA1j5GpR8VlI0eXTNyItaxA_0colX9-2saF1YnQ4e9ywUgPLE9p3BwKfjCe11VxX3g5TML29hOP-WVkOKEtMdL3intSIuLrbihs0dhNaxCM5uY0ujVeVr5Z7ofKPgNPGRSE3Kz6_GiP_yHiOihaOxCaV81-uXzp0qYqhL8IHfESBjAr68SLmgxGKPwlFdR1eN21kqY4wa8SkiGvYmKHDjftad2t8s1WyZrKf2Z63pMeQX7xy0lH1yI79ovZbvlp25dBCPc6DxKNgVC5BFQ9rEde5M1VBRiy_FvMYwyDT6CUE8x-d7UjWlrYVS1XKcpx09VRfMbQwK3d-aymArwUIQYxM5k0RDjiPttkGfaY9wEUyXGp-A0DBlFvteHDG4eqtgYV19mto3Qsf6eXNTkwJSGk8-CmU_NkmxRT5P3QVCdzF5t9A0jl5aFfX34ZirDMKqxRQm6W7gyNE7bpaobEGRpKYL9hgvcGk0nJ9GVk7OmNCnUuWVI_F8mOPP1UmWewC30kpd4O66Io7yOlVrJHUvEbxutLN45RWbwQaV1yqzQfCuJbSBc3Tsv1WvZMK8Unh5cW20RfThh7_F2cbb06OMK6j3LFX1awffhUJtYEA&prev=RQ485C7A4E90DAD4&p=13&pg=41)

* Advantest Europe GmbH
* Ehningen
* October 7
* remote work

Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS for semiconductor testing. Requires EE background in analog/full custom design, ASIC methodologies, and CMOS processes.

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[### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/8ed66b6f0fb50507?ql=ql&sig=63016973bcd7469e41d4a1825a7de4a5f05a7117&e=NmPCAj_Hh-QVTonNMK8aKUe6d-Xo4KAjbKmwMNJenwsMPlL9YQmMhylqGoJSQuzkMwWfrnyJaTTeyviscsSYhX2JbPrMFXSUGAK8c6pM3ExwisJ5ZsFjCI_75zvAHB7eVuhYg6bqJHU8hDwibTbufR3h8o0BRAeEDp2J6tMLToZE0vM25mAi9SQ9KsUtqZt8B187d-MrUpSc7aJ1WEm-KOv9GL8lB63ERVEH8n8TrosCGY231tEjHA0pp8oJK8O3afS3SPqZZ8KHOd_j9gPTzCh2seEyd2SoemBN8XcrQgkJu2C4plgGipew7zeqZ4wIQIcKiYmD9Hg890H5TL8JLsp6pJaG0eUxjffztZGsAZWwHBnyJXdDvSYaeik_LpWF-eI-w0C0epRBMzfRWNqOie7IyDqdynK7TIEOmniRonHzqmW-0J82oer-aMarnUZARGM5ezoH8E2cJY85hWkgD3Kcng_nDNhjFlyhFdz9fPH595mt5VBpfDbTZyHlq2KYQ37GKGr0ujTiFwKbrH9Ptr2eewj9990HHuC0m1Ioba3mFSaTQ5Yt0tXNGDDQogQGhJiSW4ilwWqqLk6cI9max2Th8VfoNfrsWFSSNcAMIkFRb_AOYNvFW_pbZ2-PWV5Ki_G0kVk7xdkqR4Vb-PiWBKgjsNTKPG_R5qVMolGlsp4GN9ktIhUlRg0J_1J_12s3oJ7Z6AckJcEaQ_OgyD8S9bFPWzH46frlNlLTcgvEwIStnS-MBYkbv26NoSiMvIbcbb1uzaqyPwOE7D76dtMUgBBeqIvNlhfKDCphZmatidSPNRjQfHEFrKY8hBQ6rPrlK8ZxEGCNTG8xf50Y0ozg_cJT0LMrzY7tdDeeVmK8SLjFcBxlT3rVBKpQhcz8wOQhblz8s5XhKzrA4UaB3OCkPuWA5xbhswQLUdmn5FoX4R7BI0Rmzqp18RJyGOZrC_LjALYsNVq7A4iQ86xxsJu2kBGtPOa_dMmzzjFwk3AcFeCPR1veHgkKwf-fpCWu3Wcx8C6DFiyPwLlMURqtuzHd2Fc9KlVI_1bm8jwvF_K5u-e922k7daFbuYYwfjHKANkM4ZY6vAR_x-MEw_5TPFJy7SnMO__8DAiWKNd49I26aKlrhbMwz3B5WX6RuVAJCkpAJxbBdYY0ASOuQqKConI-vyjqRp4dzMWLLAiHGOGho-uUHSnaq0PriJwcVhe_yUgURHRHIn5MJL-tGnE9WRUEKt7zN5m67Nd3gpNkMm3nJ_ZkaXTOvrvc40xsQQHxmzCXLBXeiaa_cCGrkxLPG3CQvp9_ARyscF7o6mAh8v0-mSY2ZP-d0-8XbL4Gs5_y1d1mIG2nOzY-J97WrJIQfzeimQvS6Okag3JfpFn2V0UBk8fg7P7qJEOd5NCPtgjQ89VYzyscpeSYTrWOKKRm2jJbxqq05c8s109Br5580Bl3CMeUbD4HhC4acamGaXnl&prev=RQ485C7A4E90DAD4&p=14&pg=41)

* Advantest Europe GmbH
* Holzgerlingen
* October 7
* remote work

Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS for semiconductor testing. Requires EE background in analog/full custom design, ASIC methodologies, and CMOS processes.

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[### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/bb8fe6f9caeea5ce?ql=ql&sig=3422a357e0af7d86f5d754f8e6fb0fd785af60da&e=5jP8wfZXYjOWZhDgas3Rui_HQ3s0zwSdQ12ZwoGnod5EKEjBNvswmvZrqkKdibHXbaF0ef2PFfhmIWRdriUnPYViItskrFsyThH-MPW5RaTngrb8c1MzwnEIElx_TUPie_4WUPV2lkpasTnTB3YgL8TS9Iz-JGP2fG3rc7DhW6OK18aAE7zbn58L_9e-1L_9-pwOzatrrR71n7slgy0FvgAxl1-I9zALGhrln9LyWn0jDrGSfopsRaoLP1BeAdiI5K7IqKgVmTKE3fxxAl5t6NRaHZmVhpOx0F4vYL4-4tA6UXufiD3sRkxhl3gICpOl-XgjINZf3zf4MoK1ASIvZBx-1y9Vz1YcY-bVIVIH_2-naIDWUYA-D_A3JosDdTLBXhA8lix0ePnkqLCEx2g_jQKU763KV85fhHyy7SglLoBAY8_lTgtVtlplI6SfQf8nFi81oZz3owy6X20h5WZVf20dk3dxWW0UE3X9VC9xIIVQ1LDU9-8JtmWoyFUgVNJhtBQkZayqZjziUEa6SRBa3a4JmpZei8K2i8W_SCZs8slYndHx_-dBXKVYt0tSGPzdcRBoF_zxpzM5jjEGvWCDEZ4qOnslVK0W_kjkQH1oT_tplLO6GA9Fsf2Vc-pkJxW9GFV_u-xDgeTPKkKjXepyEDN03sJCkXXDSDeG2_O2ALZIwlhzpfzw9W1aDr4Vs-yqeK8dmIQR7e29AxptSL6IY5Ttnk_NPSNFOYL_puVwXXZAIE5XS8QcQvVLY3XNSoNve2JlJdVf3TDMAmT9RPqn0VmT2Ks0KmyxA8dVOXEU1WNoacwwauPvKmgOcR9NBy0k0SN7QEqMrI6odhXIMARiocrbxSd2_OU2_qjRmMVbggTmA4R5TaXnKOSI0FTEnFMJnllPbd7glfU1mAc6mnjrAEXcSqcockWHDApf01_Os83vedkqHK5RE6KNwTCE4D4kNbEBppuVPUVJa0l3k6qHpvvrANXOm6b4YrkYHNeCIEu5s-0pj7jsKzyJZNQc-0h6MaXv1vJUK8M9-7K2srbBa_Ze5mON-5keO9MovHolhJ9QUio8pW6NQpb5YVBrYKlBxbTwgqwR_WJPAroHOAdhiO8oSL6R4LjS-UnInlgLwPNuyyZHTLQ6fvQvzv6E5VFpXG4HIUMZxiDSJGFGyQhw8MSlA2WTAH3YVXCGN3pFTrs0d4JECDUUgXxpAmO4OCLVfmi95isQlDUWn92q3qw6m7LGvFLutas9MqIO2slQ4K8X04UvUnuR95hbpOIFffkbDX9VpkWjTvC_LCEivsfOxE-toGYXUFL_A1CjlyQzg4mvdtUKQBd__KFMqgP3yelAPhP0oaRFsXLBl1aL8AdkVeUaF0ujdaSMp46GwRH02G3xfg3b2OLBxUNhTyhRBiqlD9Uoq8fx9CFiUXPM75l-RZeNAF2PUp2qYNwewCxrllhDpOnVRTGlKbgP8onNaQ&prev=RQ485C7A4E90DAD4&p=15&pg=41)

* Advantest Europe GmbH
* Schönaich
* October 7
* remote work

Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS for semiconductor testing. Requires EE background in analog/full custom design, ASIC methodologies, and CMOS processes.

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[### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/3cb59917c7853d79?ql=ql&sig=2005c86c35c5539d789313bbdf4312d58fbac067&e=nVwGwE13uSCtMhXPi2whUdFDj8gKr9Tb2ekxh4udu2BaP-kO9xfgt5FDyP4C9IWWNnfwKPYy3EK7kiv0BBZlzBr2dPw8lV6z2d3XVaiMhl7eUzJP1Uhh0c1gXE3duPwYZGV1nJGEKBdFCjEzgh992W7dRiey0ziNI-UIAA5C_yCBDVZm4GzhkN6Q1hND-hwp6E-iCONpPqVapG4Rts2AIKScEED6UzExJ8TP7O_qekFyxk4u1bAIxJMNf_8NCovkcVXfRGyLH3MqCg-24ZJHd2KBJLjmtKmTMxiNp3_KE5RPgRSjzJWEGRzOwMiliePy_8hf5K-xpbdGtK4zMIxUmIyGgR_XVttbtCilyaJZ4HP-fyXTBEzMwNmMHXatpXjhQbvLtq9u7yP1Q6TE5WcD9rvdUXofeddx7jUtb7uqKi1RqmMsailDrMaaB7ieRcdIJSJ98kzSPvDKhRpC3JSaV6RbVKHBVEY-QPIcnzOS8mM6l-vZtJ2nDHP8H2TnSt7tjwNZZaIGsYiCdiRnM9yo5WqcL_mF1VunD2X5BESNndRx_lVJQXsPKfKpu_SfACSL55FBr3tnsMlcmj3lan4DZOiMJlirlB4Lz1tXKaTRLbf1Rq52f92yFeaxJ-nuoJXm4VSgg8cVwe_WDbQC6ssF4hzUpXMjFW9fDpwAl2jWd1VOxTpGzqUwdo0UAE1tuzvcWbbnr4c6rAQ1h0sB7i-sueGvESuMOS3WFJt4sP6iYjZE99-Vk6ashhpc95_JA3-vTwJ3B0e5llHiL3y2RJ2igKc2YIelXBLjYhhbFegaHHEuUsr0XPJ9SaGeOTb-nD2O0gy5H_6AsHsDhVK0wj5FqEGnXoeChAt8sCmsZ6Nltp3RP2Ggat_7R0Gr1T3n0RyI3wC5tW2ntNhJMqKp9Nlvhvkusvo5ofUjvMaOwrL_zba0o0c9eC_xyisxiwMXGG6PEl_lZTn_7aexKo2M5aigTIW74m8j2Ew4b5pZwPxjBHSHI_AgbSflV7TnDk0qyvzajvGTj5lbOYFEzuyA7oF4LfphgcSvE2yFI_7FI_rltpm9G3gpGrQ2CdxMCdfF30hcQbU4UGLZ3CjOoQzfZOXeVeEARv446nJ8_IrWpzBpNoFEaxSeyykVJGmIGNu0_QXhkq78d_gwmadF38b2eUWAla7fIapGf58cUPvDIn9kTGVMqOitS7N0pLXe4POseGnGoX8XcGiyo5XrvddcfCKTsCUVHQsyTPHaDnhFVZIKY2HUqtkYAGK2IsCApi--Z5K0GbrNN1I03TwPuCApE-UpBVvduE_E-UM72_o36PAmXNox7SNIiEcVCIpvq35dHfomxl0oQ2ILqpUV9Zndi0Fhm19qfZX8njerOK92XFT1w98uvBdK2eAQYiAhjILgCkjAovPfv5I4_ubNtYUCordaL0jM9w8ctgbFiRG2vUGpY5NpxXbVI7tbFg&prev=RQ485C7A4E90DAD4&p=16&pg=41)

* Advantest Europe GmbH
* Magstadt
* October 7
* remote work

Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS for semiconductor testing. Requires EE background in analog/full custom design, ASIC methodologies, and CMOS processes.

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[### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/075881f5861078b2?ql=ql&sig=1e8a345f305b5811316ee0b280ec7c715c4549be&e=q1MjGDEu56gNeK9HEykUYu7uyylm-MIvmE0xXuv-jSrqsgIAbY7ltM67CJ8Qz3mGWLH5GZE2R9vIrSm2ARtf5CwrDQA4ionp_wgaanWdBfx5x2Hdl-IbbDRRu1UkeKfPJVX6xafrJ3-4oHQ-nl7NgIBBPtaFu6lFPx61kDdZ0nEgH3CVfAKEQlhms-_37Wr9J71W_S1U15tmON5JtbesonFqLr4kYRDWVr9Cn0ovbvulHYWp-7BOhQxoeZeVqI7VulA340HS-aGVBMSMbvgEsZ6-ciVcvCboiRdRgz5247cekYaKLh7bIVUj6zbTgY6SovGI7JikYcBklZTizpGTjE3TCzlyeJf4l1gQ09nWOMo-X0HONyGuCr1d06fkhtD3qS9Ik8T4dCgVt4TD42_uDor6YtJD6E3fkprD18aBAap2mPYtHuRXNrkNXBODV-fuTVwa1ItbxkwXie-YxYFbW193MhOcYWP4oDZZHYta_ovDXXIlmbUvIFZdI71POqm6fKX1_7vYg0WLg-Kxg0AUJsRy_FmU458OEiRX2VPS7N-HN3sW5c5PemC0dOFoRegShYJByFZ-NPncOF8o6w-4Uu7hW4bmE6KPBEsq0NsdmzkdqmhJwKK25A0R_RIiuKtadTTlRbzwP4Re_AH2U0Gdipaek3FDekPYknGneg-tScToBymFfkbXoAzdJnZLJeN6MIZ3qAkshNMaZkSn9LLuIgbbZJf-nyr38uaQ1blK-LclkKzaznrduyFdboflNhWkvygVECeYy1IS3fTKC1Ka-BqxtOeoMA5kSMmxwFmP6-pbJnWfZNQ6F0JEmigPtFKsTK8r2tbXGR9vg2z0DCzjWliqXYFamTdXb7QBXNYTuRq9MSNABYkLxenVnofuXHAnO4C7NCxIDq3qiDGbEUXNenzqAij45Ba1R-LQAVXEzvO3iKXZjkWg7K0z03oYUCpcwWQLPGFq_NhlN91RYJ0XfwDubWtzlloV59W8wip3ctV44sqs6qGdmLwRPc_ZmKY3xy-ehfz7uAGf4T_pmdITfS8E8ckLPpg3JD7jlPGej623X9A-igAD_PRMG4erksNNg89YWFUJ8kuBsAg1wnpM34eo7XY_bK7_gQcriy1-g2-rrjFI1MNqysE12pwMsY9IGdNuBUfPrdjboGaHA-hmmaOFy5e4DspXofJvU4WJ0PoOU37657tYPdMHqgI7yj843gSW8gd7Ale5bTZxVuPJckc7G_Cb-TyKkeuMrfM6GgFAcZzfOffjKr4SW1ObxIJIJtNiNd2s6vXHQBofIAyLmx8PclwdxkEQDMEkAKvClVKGjC6DSGp_E_ibpJt8uVcGfgJfsxow3b-hsAPB_rds3EWYuFn9sPtJklghewm0BtcSnHwSUydG82_fPMmshrgq5BldT-cA8dhuVeENvJiTHXfARnI5EQbBxVqlVZP8GSsyLDs3iWJoP-7VXSg&prev=RQ485C7A4E90DAD4&p=17&pg=41)

* Advantest Europe GmbH
* Sindelfingen
* October 7
* remote work

Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS for semiconductor testing. Requires EE background in analog/full custom design, ASIC methodologies, and CMOS processes.

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[### Application Engineer - Silicon Photonics / Automated Test Equipment (m/f/d)](/clickout/85a106c27443ff2f?ql=ql&sig=934c44b9ca267d7cb39ba8a2cb51f7c13b6f0d1c&e=XGaQHWe99h9do52t6-2SHsN7xTjUnj_1qyMEbEwSP7IC4W52zFyfHITLTMDis5RdDPQFzTmJqYMaezNdjBwlPfDPFiHU3I_dED54qTShNFMoHkgJXVEpinmeyVYObCfnzYJIaxPWVzljslZTgQcqRUi1aQNLCYomLjmyEAhGYEkjSIY8dwKB8itgCgwy5hsLLG-bJMCXm9d4X21_ePF3qSFG2W7SuO7E7nBPHlDsMVIhzXpbtGdUoNAyqtpV1pRzRAXQMHATCdCiFZRrAZul9E79_9PkkmqbYOpBcn1f1CCizcoqc-nNJLtRVaRSdSC95QIKtORhsMcmGtR3B1JncH9xn75s2hiHfrTi1gbJ6t44iJRYbnOxDwqU0IpdOKUG_RKE4X4BSg8gOHHxPYQBKIKZyxfvoOdzgUBj6iQlTlW2HrhuYl3ENoDvNpHFt_XMb8B4aCx-Fmr6CyLiah8Jb9cuKU2b7-4beY5CMrprqhcwp4O1BL1vsFdrPI5NoIVwOvVgck4KK7toTLS7K38Sj-XLn7cO1NbI5BbY9F9mfOIeUbFVwOozKJa42dGQlcc8bqsZ3cdb6UIp7M9uc3mcBgAq9WhYvhKMPv0WhEDLALBHNVbyuooyRe0zeVB0zIgbf5KPqZ2BSAR-F1tM2mqswUWQ3HGiNpibtypvPXHBxXGPbsvUN_Hk3I9UashVZ7kec5YX3ezVnspm5jP7EEHtAr7R3M94aPB-sUNsZXxq0kdHWGpWf_y8gkqeIdvxY2fpkiuRBVEpfd0FGLsFrF5totMLbaYTETSLoz_bHSwoCDodvgmooNKRyj9f9ZPWBCfpIb1YJNHdPgjFAd4Pb5x3VnmEuwEm9zpkNQiVHJQm3AuLlORe30VvvCVL2ntmTtgQvMZQea2tESEl8-BKXMQQCbNqjguqL-7_unyMPn-_bXp7TRVVyYmCXkFFFYduSpvR-VUqenDBQeQLrBeqytCatZ9pdsx0XpDRl0DKdn8HnYt3u9-6Ve4fEYflJn208yWs6Ogh1EctO4G1NrxunLef_j2RCzRzbjn7kMHaqJHCTuLlrLQnt_ERGxnkXitnJ4hnuxqByWGMCDGhY5gXqTwuvjgM1_m5L7EZMjVRgVgIM57EsTeZP3KM6Sqm_zmZCs7Rm8A8aCWIvcVBHL4mLgTQaZL8eF9At7zxVk5RQT0lYiK4oRC807W8dQDaKgJHFyDylzR8TkvpBrL_FOA92qp7zZURVNWQMCumThmxUn1ibz_o--KjFm66_bfAD7RLGfblADGOFztjyEvwLwXh2TkYzZCeP7Cn78lFtuOpWMHJpCTybCnYlYr3N5GclWtGU8jQKGnskUwq1LIcqefIzuo2NsjzyoL_9341kYK_v2VERxZ4qYBdFA2Q-NPeU6y5BMvidPxglLOJwT0c80dtCrbOtLOzHB0yxyCpCN_4trDgoCuZvIolvpqcir--PQnwbvOH1WAKi1cL_zV2CsfHll2kh1AjlU5lmN1Et3-9&prev=RQ485C7A4E90DAD4&p=18&pg=41)

* Advantest Europe GmbH
* Magstadt
* October 7

Application Engineer for Silicon Photonics/Automated Test Equipment. Responsibilities include integrating and optimizing SoC test solutions on V93000 ATE, developing customer-specific SW/HW, and supporting customer product ramp-up. Requires Electronic Engineering degree and 3+ years in semiconductor test.

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[### Application Engineer - Silicon Photonics / Automated Test Equipment (m/f/d)](/clickout/6059fa78e5d48bd1?ql=ql&sig=3ba2fe90f874a1da0358921d65c57004b5ea1f81&e=0L6sZ3EFOkGdoxULP1x2j96sHwHov2Mvqy6ruHw4Pu6OAaeWqmCmWTR6q2sC8PWpXfEdr_4zhY7aW25_pErYDfRsdWIEFKuvMf5KXF9N9G6vOSPmrCJCQBX-4rQVsSCauRfWxSWSspFmPS9tSz4XY0J7WAwUkN_vVvdN37JpAz8I-dV9dwcAQOH8T7YCWPmfnyWiHW_UEN58IW6vR0hdF2p3H9iCbcUesEUbVRfHgg1XDFDD5T7-Xo6a1CwzSXX4srTNv98Mp7PrgHGoGLcaxF8yrA-WfD8dzU-wB00OCEyQwfqYbPqzen5AppvBdb6gViFRTNOzjPPllsQTAfoj1u9jrjvqOvT1bxHx7ooXesl6tzgI63ERAOXbxcgqrXYXfjPQr_KpIrmZixHbKDiSEohOHvHOPTcZCIHJgjgEdumMiF-oIK4hrLUVrWhe57u-QnPSQaNl_IYO_JcrDbmSUN7o5o82qz3806Jh2LHYYA3J7_OMcgzgbLZEGjzmF_phjdHwU4QLgh91VUdxmiRkTd7At05aDXhed5uHjs27Dkb_geCG9lRwmdYMhql_2o1wJjs5mySwZoSdUhJV8dujt5oIb2hRiAQB-uAZ2r8b_6YobAi_9Zf6i9K2kGIbjfgKs4Sgr46SjG-xvTHHkF03dgMVtrsXOBgRqb6H9NgdTukgFAkW3KK5kFsIM2P_OxkZ8jUPasWSqjx1yBXR7J4BIJTF-EZj2TN_PkQfNDmvnifUeytr8GMCyQj0bgAGbYNMx5zgSwQNuJIr-m0v4_d2wTkdpFAXIqmLKwiNZveVSdn4vmScpO8W5AHt_DcDzz_dAsX5T1v6oAsYifv4vmydq3S6VkvYHjHG-esveUuwzauCFq7d2BQ-Ad9a7KMV0RKIPaTIB6D4s-M-6Izm_k7W8n6sXV357KF-z-IGR5P3dr6kzFkq-A1EsAXeyol34nF0CRsd8ESFm5xJuJ7vrrhmBTRCKcVBOAXddQiI1FiDWS4RJvo1VLWIHKGRNbiYaVV9c4uaIS2EJ7cbYrOgX7li7x4bo0l-VmobK4sU3i3wqN0aQ3FoJO35L31uGYjXxwlN9MyK8-RS4CbEHV_3AHMNY6Y3H2LXahZiuNDFEG2sh9-G1lymuBnTGwewPQC8PoA01whDXTH3WihXXDlnF02a3WcO_XfwJiysPRUSFMVnxRzojdLrXdFJsqppB69muwCkDmhZk1wexONsn0Bhj4Cs5IP0WrThEpeEg-0yEN7VPRMHVBRP6hn27vmrTFq3VcUOJG96YWB3WM_Av1gbPgAr9AZ-AC4gJVZrJ3qHC0vQy_lMQfILFb0PgbMRMAMvWHrgkvTx5WHcH0iWbDJW5Qc16ZYlmyqzCDnhnAuvTAdIIhWVqEza73A4Hu-Btl76Pe-U7gHuJprDJCP4DIno5zymDykzQ9aMLJeTiu4qyk76ZOhfIVbfzs_ZNggQw2cPVT8xLQKWeSA08-YX67mt7INGm0uwZJhW4FIU9VfVA30L_dpl&prev=RQ485C7A4E90DAD4&p=19&pg=41)

* Advantest Europe GmbH
* Schönaich
* October 7

Application Engineer for Silicon Photonics/Automated Test Equipment. Responsibilities include integrating and optimizing SoC test solutions on V93000 ATE, developing customer-specific SW/HW, and supporting customer product ramp-up. Requires Electronic Engineering degree and 3+ years in semiconductor test.

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[### Application Engineer - Silicon Photonics / Automated Test Equipment (m/f/d)](/clickout/b57f39a04b4fdc2b?ql=ql&sig=49458735124dff1a79888c288723142a01791550&e=lqBjD47-r6Qu9sh45DxEntF6PTNEAcxStvNzZgymxgByvrDBJin5EPiDprgzCFupfDCmeMOAqXTWWPP-r6y1u4jurFbJBK0Y84KhKg5-8FvDcvCaqD-DbRP7qmlDBsFTW5xJYIQvN9BbVw_zWzNkjcqocKTMG4krKfEsisomN7KLjLDi5rbKlPPGNQnDB7qnSxWPd9rG-o2Y9zl8p9VYU4i-Cyg3c3LuSfKGsPgUVhEf7-yXdUthRcxUSdtayaNQi_KWEmKT-tQ49RcfaBNrNw3ZtQeqePpg2twdVXcdOGwTnH2j0jXqmGO9QOCSyL_cqGh5KqP8KOSXubDvDYU9Xji4A-HSkIuI1pnt_PxnvGYkDS4R-cyDXrzqhWMoLXrG_QE9Ip1MtUcf7ZVuKKouJvXhPYcKA0Mdv6gyzFIwTc0Zggu6asMqslg-ZbarboQsFM-9XfPfQpOWS_qlIhOsIYvx-_zQIFfy09q-J9fmQqHyB_pDB4olL-c4reDfG6q7qJS36m4t7rFz4W-yZNL2FcWSSg-kGk_6G2_RV7JgAJ_gabKY3VeOoyJ7_8VMVJ2vZyH_3555msYFGAsOvHaqc0ZkPJvQuOg6b6gAMf8ryEB4ZpPayw-CIu9NxfBgvOAEoGiv0xStjeHVESkSw5KhirDXBZxEalu_bdA0YXZ3HxPw4czZR2fnS5QGsOsnvHWLJd1ns5keoO_2uObReUaLgtC0CjJHTPPu13LdgIn7J4-OrHZ-FdOGM_LkQ0ChwfvTOKuS_eeByk-iQCYx6xliLfiQaL6wDfMGLG-mX2N86HTlriAenjXaNgKS4bwiJJXf3FHIVhyL5f42lo4iv3mTxOQu0vA5Fr4pgIPLhXpk2Sz7adYvDhoju-Kb3Y4vzFWrOzl-jwL6iCtw8zpuLOcx3R_pe78LMPK9fx_2akhGFODqaOMOxtHjLt4WLMH6vGM74WXLUW1Ha0VGD0gPprNMp2hMqKsMjCIjteN5RPLekDvMAmIIk18j1f9Rb9ebLie5pTCGVUUu6PsL2ZE0tJTE-FFJVSkBrPMq5Pm9bQ7lihedD2hgzmd78COMJdCUZHOgROFsqrl1s41Dl0r3QBop09DdCwgbrRY2DE3q1r_IYHaTmLSNnRKGWgqx-qch2O6MrM73tzs1vYnqSsQuEV1dRTvkbKFtnBYXX4SRLcFWIa2GBITby3b5_v6EsS123lgGNIFZZKbqLvQl0m5FRIYxYvxQ-r6LpYL2P7Jd3jFHnvFx7jExZpWEeHSBNmihIXp-uSKHj50KFmekj9kBlAwZpDtNMt50srABnnYm8TKNd-MEaljaaXbvH0ZOsSU4aEnvpfw-z4a3jQDdU8FyhUrX671Ecmf9xbmir4WVodwMpvEhtJ5HD-hzhceLiG4sgkv5ed891NmR8uVlq8rSQ_PpB8A6PziFxVVToAIeGQFN95tAaYjC64VvqJJhpDMJ0N3DFg80AUVm-iQosf_fxALk-LPDPE6dajya9LUr&prev=RQ485C7A4E90DAD4&p=20&pg=41)

* Advantest Europe GmbH
* Ehningen
* October 7

Application Engineer for Silicon Photonics/Automated Test Equipment. Responsibilities include integrating and optimizing SoC test solutions on V93000 ATE, developing customer-specific SW/HW, and supporting customer product ramp-up. Requires Electronic Engineering degree and 3+ years in semiconductor test.

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