[![English Jobs Logo](/public/img/logo100.png "English Jobs Logo") ### ENGLISH JOBS GERMANY](/) [information](/info) [post a job](/publish-job) search # 3059 germany English-speaking jobs in Germany Include languages [+]sorted by: relevance · [newest](/jobs/germany?sort=date) ### Note Some links might not work from outside the European Union. Dismiss [### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/760052c5cdf295ce?ql=q&sig=5f7c018059190b9fd6eaba6b138ba372c96d945c&e=Eb2ryLxYPOJ9l5FaKZXq6-rpD49Qhp_YCD7xQYKqFpAtFr29EpIF3YD9-dOGfQ4OYV-9roEHHPNDMZLcy838AJ8baLBGdycXN-1i4wOll-mKaa269n1FoqgBjPwtk_NScwCkqhCZ082TGtOGoRlJ-NPgvCkbMlczK6zkRtgE0YswlKG4e_-_VxdHFk2mEO6XwmUEmLOr9P4YbFwygWS3dgM2XySMMiQxHzpd5qUFjpS_eWX0dz6tuTVTo7OZ27It0nobMlYxy7UtVJ5x3oSrNdybUEKylkDSIl0iUxjKYIJ7nBAQ4ZmW21v1E7my78eNrsf-RqqURRA8B-eSPx8ZGi8RC4Z0iNcH7I6941loPHhTe61yEgPxpt0BVuRHL3VmfKlBtnVQcMY9-bJaTijS3sUhiIjHK-q8EC7jxyxiXCp_dl3AQ9q-Yc66bMGx5ABkBuSid-5kmqHstICzk3nLKgEbXAXDDviKGdHThBucrbZdKGtzbm0a_CqEwVeLNzn8925prJWfYkgRou2Q7REeAMX7QTuD0DnmETgc4IGqPL5AbO8E6zA2lr3-wjlMXuJufH8ggwnRmDMXhYDuyhI79vOHQB2xn63dzbmZOi7CaA8LipH3ZB7OmluDrF2006JDcBO7R3uvS-txSvoIzP2bFs3pWNMIXlTLw_N4SDgZUpXpth6JY16BT8lOpaaRg5qv1h0CnL1Gvfg3yHqnyTVrl9OPsVtbdU8gerwXj13GX15iG1cLJPf0fiRLvNjdMj-GzwVgRg3sLe7JZeieBNdaYP2wAx5M_Xlk0jLIaPJuYh-zvekCM7XCG_Y5EfmLtUTP_VTjblLHMZNgYSYMx3E1GGVSLkx_rRZRXBT_7droXWE6-U6JU5EsM6tJZACQqfeCuHIEbwb8HDTuunvjJ7mZBx8E29431Zo9h6XoroqZFAXumV8GNEK04aLP9OelEcZdrKQvH128eIz4G4x5i86lH8_brjewU-ttLtm0Suo_tkMnLH89LyUQg8-YesjVWuwOrroTtI4dOzXpY2Zscs6FnLNRejhmvQt4qvtFycXThCCq67w9W43G69Sn43xUAyGr8o4YJsACVpfH1K064BTEgX4UP5IihLjy-FlorqhwcWjoUbS7s27wX7Axxp35boHvJ5HudSWFdP-LjIISN5YGIh6_FsIpTBkShXwmXLR1hWrX3NOOjypi62t8gFPYDU7iDRFrR3HSisThLNdf4APj9T9885Vw8pyviZwwao-0j3eMkSS0T972-YjBlySh3ZPVRuEC4bvozG1fU4sgFZDTFigR9Fn2aMd_qnRW3O32jITGvqTrtpYM7qVdOfOxjBMIs7uSlFdkjTUN4SNvwHNeswJY8UVZ9gXbBMsclzg_j-tIASj8tg2LgM8usBpEm9V7YqYRXhO2QmsKtm2hpFvZBLOtSeT2i9qIXc5YM4mgA54VyML1Xtv3FBeO71tl1Q&prev=RQ37B65C4DD1673A&p=1&pg=140) * Advantest Europe GmbH * Holzgerlingen * October 8 Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers. report probem [### Digital ASIC Design Engineer (m/f/d)](/clickout/80eb25f1a6844e28?ql=q&sig=5c8ae5b9b7a755d9f68282b2821d8ad5525cbb3b&e=E_dEqPgjjFJR2plU2z5YbD59j_uyBOJ9iYd6Cfxkj5jgWo_frxKs43NuxtCSKH7gVrKNvG6KSQyAgqp1ZS9fOuZf-bKpKlCPjj6dZ5B-1Oim59931nzymGPo8M39idf6KnxH1wa-yVmThqdxVezCmqcFD8vZJidySVirojuSbRqq7Z2qcVZyaHeBxq65wEXD6Kv_K2mPvW-HhFC_FQCa_Ojf73P_Ri90eUu6KOCsx6MIADyyO_vr9YVb44AQNtXiv9lSvjPEe-hOw9vP2KTss-KkjMn1xwZMgsuq9t2loPc2dmTd0mHou2OSHi-VwA7p7M6X8vRJ4w3XQyxGLFat4Cp-bobhQ1ya1s2bMJRfMwOufm9i9mBB6fyji8_GRTVgn4EYEdlldkmXJDxkj-JAArKAeFBGCX2qoVgxs0zOy5niE5QSRe8hP2AvpEh8Ss0OzIT1M0xt0PQ2G6YEzcbiatmBoSApb5PyX2d_IghUVa2yurF1tCQhPkSMScx4qbtv7I_EtKE657y6bdZCFWGtBVRTZe03qxEH5R9X1xPrNo40vNmYfsa9Udjz9c6CY6DSJ4dsCq0cb66_2ohu0v4C_dHZTXzfKLo7KQpoG6PU7zfu6TQE2A0QKCw-vKMnAItAvB2zSVLq8YNSKcjJPRYjV8VML3e_YrDrVOzq_DbALl1uovPgZKhkuhtrxU9C4lUGuVkcBF69Ah11K-ATzPJZpmTiwX03-CiR7rhp8igAPt1W6Q3QieKDYndCPM2bjoZiRQLFAyahpdpc_JW_ict9VJYFPZa3LqNq05_jpB6rIrKzhO6GuXKRWELZdQVdst61Ii52ZfLTrK0XxKFjb0dFyj2Awr0H9TLJxLCTNf1TwQ5THIVomgEJ3q2HFjdAo_lbABYb_RT-rgeyWwUac-nbgp6wEDUil-aapaq3BWm3xE3IGYiX8b_b9nicAMcQ-EY1IAKpA4vYmgQS33aOItcHdlQoYvZEkcNgED5K1GV4o4wV4BqO5oPrm2F6iEjgf-_NrbwuKrVhdktHRNVwj_biZQ8BFDfsJuJsJOAmF2uZcgS8sTgquT-_dEX-QcKGx1LYziNjs8JG7y-UU_l2Iis-meNwxIOSeE-uVgIOlz0lYmVaLnAbkd7a4uScSYbHiXdwus7MFfggRVA4U2c-_yrmcKa31j40VqeLogG1mP9RUqL6sa27KrWhREXZZH1BuBSSVewjbE5bJaMgRhL19q4C7m7sxwD3qtBh1HfAmBSAdCvvVZOSnr7_5xNLSgJotUeqgOvTKf1TPI1Ph0CaRF0mWwE9bvImRJa9y1Rb1oYYUlVe0QUUkNC2ODeh2g16FF3xgGwWr18bHAy4pkvTbN0J9GoaBuCDCNs2ruO4PQVZ__TcywW63WNvYDdp7SBXQ_CjefdMWnW4yu9cyDrNsmHzgQ3F0M7vc7M7XVT25vQVP3HZlQ&prev=RQ37B65C4DD1673A&p=2&pg=140) * Advantest Europe GmbH * Magstadt * October 8 Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience. report probem [### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/e8caf311fd257fd9?ql=q&sig=106d720720324fe0cc5b8312a04e56c7a49796d6&e=PWrCl5hYH_nAnr24h507y7BUnkO9C1TWSlREuDDsvin5_4SKoHN935qpIGZzKFLdtzHI2a6JkXKOp3Ic0CBwljbEJfBIMJKLyE5r4_-Q670Ms_j-o0vETVN6v4o-HIF5TzxV-sMc1IFDt8-QgMhU0I9rncr0gQSfUZWejGwkNzwGHklaMKOrmvgVS-5TJMTsJj73bvzs4yXHwNBDpnllBZxb2v6wIdYVijrYUh7a0E-Kbv_zx5t3lFNIoWeFkUY-CInCQwaP7F-9kWT_vZbMiU5a5T_B1rFBag0ty8RkADkGKkRchQucIoT-oKujhZUbIdcCnnBkI4VBEEg77Azo_Ha0DHpTOTSY2PJTvNGoC7VJClW9WxCR7FH8ZcmDjTtjja_qwQ5hHLdHdJ4_UVgTo3fa5HPbM5CxZaQVCvq5zv1Q4GtQi9T_fZEhPxorZmJmX-APxRPFPQGzWwtT_qSavevXoOJRd_N7KglXQXQh4jLbBzs3QVDIFYZz9ysD-3vTbrtwi3Hhk7Fi77RnujStdAJMBIpo_9FNyvlZ2-3FnVIEqrmUrc1OkiaR7IRx4rsCPJUy99_MN2mAcLFTzTdBIsKbJHCaQpj269CS07RAEcqgUQNSQT56UFD90WnwUc0hqw35a0aihaag5vTnyW-nKOV90jR9GCV16Hf3aYvFxPk8U5P0PVWt4e2jT_paYBkWE4jIpMtuAU1ky8GGVVsSBTrvzCTmkYIDJJw15vE8M57eSxHOQ3SBdepnwgQVo7GHBKpBZ5jk83_-7pGAMkLCOz6kZSJkVc8-gpD10s0v1Zd7SySao60lkQlWpe005q7hauBgynmfC--XQl1sYXSysLko_WrRgcF1Du5iU-_ecrzwxNn7BHs6WqZggfr6WvxZE6BHLoBbadFY_5WLseqI4I9BTf1K7wCPPp6fhx0IDbzQtuLlCgJ8amQEODJuWoE0hmLd9ozXs51KcFphm2vzXBQYIwm61NJM5ykNL9_deR8E0cljgwNKArClIHByrD44ROUvCNdQ54HeySBVfx0oe1gvqIer7qScMEQ31FsFVjSBfJL9xEn7Lh6YE41Dx2E5FpBQQxjey_myq1meCYa68iT64MJDj5LRjdIr9nkgZtPt9DW7Qucd70ISeCvWryfuf_i2ITwPu293d5n6VtBdMQZISqx318lOrzyxQir1vej-M5lwdsv_3sG7x_R4of5MsSiJ_SHlBk1Cy5MMVu1Bk-AJRMGYoj3yumFsrF8ykcrIwNTb1eZn5eV33RKEyR5GH0LJVm_JTlgQc7wEgkG3N5Zvs6OXFxCvno1-m3vyS_FKeYyAXYD_oVFyQbXxOHbPqRsAEnJAcKWxmEl8AFz8PvCgRiFSEIOcSr9gMJkhUyBD8Qi3u35q47MUla-WKA_9ZQEHWGfEuo275IwcHOuYaOevQUvU9u-mpCs2GtM2Y1NvEe-GmYzGthJ0OV8IX0jBC4TVqq2UWqji&prev=RQ37B65C4DD1673A&p=3&pg=140) * Advantest Europe GmbH * Schönaich * October 8 * part-time Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs. report probem [### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/38e285906c19e3d3?ql=q&sig=3580d688cf38d936b692e1eb84796aabc581db93&e=Jf8uy3EYJjUU1GajYmithLb0Q1VjYYMWflwR4CPbkdT9wSsXW4Hf9f8SoBU8mGhBgzAmmmsTrqDTjTQA6IIzYyRl-WjMCtu6WcudgI5QXMjaq14fQsNDa-RboGQodLdyCg_uayZw8sNuvdTFwpi1ngunP6IE9Jce3R59GN05k2K6oN93--63yHYMX58XHqnEE0vV61nzGH4u_xQ5W5znv3_gAeT__yBXkFG-dWEQyOt7pWQp3aUGsbAJqtREF45dXDtvbbgyBTypZBSlc_TPms4PNQ8ErTLubt0AC03GNjKs_2dz0c54eQ2Sl8VqybAPXeysrcmmitdQTI5l0w64io4m3DusKAH4T_WPnDfxLVpOIrR_mXDbinSGGdXJuPDINVIX8qTK_tjELeS50NJrkfai6-X5ILvGtbZ9-T2iaaWpI3nkHO89_MXrm2laU7eKvgXFyerXJkqTtHPSLzNkgxgZK2A_E0OGNhglGE2c0d4pbqIJz25HeKi68484i0arofUwZrzzrPc4eK-BUmW1eVPFWU2v8CtKa_oP5NgnT_ZpTePUGhHBbAEwt8ViXbD_t1LrQ9uiEaJ95GrDWa9BhpurzPK06uu-70SaniAaswFWdnTY9u7GU96DLuBZw-mB53yZTNwHcEXVpasWuZSSPVl8x4UL-dH6WT1jSD2Pg3GKzdR3q66aO1rFqA5TxhD14V40TtoAaFxlmYTNz7JzRFsk285JWiBUFVbXY1ZS5nMYFXuVTXiqhtmBuiBHiGvgsHuJIeJIhKOxb6KWY3qclx6aTGR0-qFwLu9qc6Oarw9MoeMljp1hPPxruT49hvWTtXo4EVbFvzmOzZwUVoLEVFihDZvvCnc9ICXro1VWxpYXFx4YotPvXFshz19zZ6UrTN4Z-sM7Bqq4dVrdXWFJ2z_58F5pbbOVx5BXrmPZacnyq_I7NkpdFDgJ7YEFXToxqAXva4pZ9c9aeKwBer6ZGc7QTMQV3W2cp1Qp4SsfV8Wr3mSiSYNyx_2ST3X0D53pTZWs5Ti_S2G82-AfkeNg-VguiCB291Pk0MZ2fnrLq4WnRupbdIoRXYQuqDmKUuc2f-I_uGdBiVYKjL2eUs__DpFW96QJt9_e7sP5ZimRuYshp4DmXKT8L8j8teTIQq2yeE55C13-SQFX46QqGCZ5-Uk5fx6JwCXt4KpkPevtoYQimLgipqOE6QV9pLjbkQeQvWHHZHHoQq5gnZ0caKIVydU3b49mhUbna-fh6MVG_fAtyrjIdvW_yLXTnpclAu9B2hEHT2uuUXaltSDxqbp-7PNgLRf3qkPjBQSqCGSSIvXmH8QlywXz1FMDj897a3WzOUasI8QewoHgSnPwSkhVnJ_6Q451nD6an1cLdqwmr_Z1PWgQB17XJwPDfVb0MoZvwH7kq7Pg-SYAwHEHDloHezBdh_2GhEuTBMl6vKyFzEXETUDrDwXGx9E&prev=RQ37B65C4DD1673A&p=4&pg=140) * Advantest Europe GmbH * Magstadt * October 8 Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers. report probem [### Senior ASIC post-silicon validation engineer (m/f/d)](/clickout/afbf11743ce40ad7?ql=q&sig=262bc80b57d17121fdaf10ab5e82ab09ea239b21&e=Iue3VP-6MbJBmHZMjzr462ZvkvADDkcZHWtM-JSUdYUuju4rbjz1pv8cYZDN8zd7oCHby75ivYmv6U0K5QvpXBR47RMcz_9t1R-VOzLHxOT5IUnqVuddisVTd2_dznSvkSV6Nl3Zc_5bR8RI_RMGkhy1JEHQZtArbNNf80DJqEuW6PRos4n9EiU6O0xoN71peNv5NhF4056oO4HhF0LVihEOFHzZEzwwdehNOaZ4854jMY5mkitJyN8LiA-DteRWOnLrozh7-8cIwR1jlCRM0JYAghUTBX3Ewh3iahL_JsvdglCBznwHww7WNeZm1v09WZ5hTPknqrdm_0_u5hsZ7ARWzHKTAujjS2fanAnzEkzwifzm8XXSVDYH7Azb8SS7AeEJerKgIkYMWCbqkyncJk75b1GujU7GICdsiXID-vWIunTpaQiuMiG5Vx6z4i0bdmtgkoA3mTPMWcd_GBu4wQQ60mbM2tTx1-KNZ-QmXp-AVZkQMwXc04v5ZwdqNML6oNoc2sDcDk_ZyOVLmb-Qcype5MsQOBOkVZ58zBBi9Sybbz5AN9aPiNz_k2_dN-ou6Bssg4Or3OhkczFBT5-lFxCM8y180wUhSgYpuMyi6XTrMuqVgNO1407tkTP1r0zFXsGYlbMDNpHyknjFIOcc-2LKXfP5xbH2_uGSpgXbagk1-Wocui_DHaob4UOqRs7NS8rk-Dm20nu-fRS5f9WWxmZwgDbA3LxnMKD6yJci8W925dUhGjXhcMpvhrq4cx9h08Cd8MLAm51O_gPWejNkBoOhFQ9BER3FYlh4oH25owvyoF3dZ8ApAZXRT5s5BoMLVqsuoqcZP4EGc9evB8jP54CXyM7HvwxOd3cIW9CqaLTPOLWA28QDv6LTQiyJWfl_u25jFUdbl9Wd23kwKVfmSnwY32Y-M4sBakhhJ7oKy1Dfaly1_uEI4WhLCEVIdZ44a31Wdq9XGY2jaKbWH4Y6l5LkdkDGlPplWBs97vKIJMpbkrkM5Al6czq1aEk3W5nM_bq6cVYQfQ-hYS8UFZSVKWHcSD_Z_2bv6HyhTLj59XThK1ke6IGhZ4I7UwofncrlTKnw7kdLm6vihLMDQ8hjmORb-SVxGgN1j7RFXYIxkb2oq7vWvtLdvrmOv5O7-6zzqafjzNBywwbpl-2b8u69n_XZg6QrPZIYxdp-pgF3BA6AcCaVSuzllM2xRC8Lfnn1AYNoqGpNQP5xlq3-Bq44wOvXRCiT6yl6mPLpDA4YVIfM2LHlFdiLy15s-__hrvoeI_LBX53XJpy3r0nzwHq3J_BujMmoxFtzRledmClexbBgnBwmKSCgwEq7-8m1sP8wU9JgFl2WHUrdjrm_3xfq9h9XnLPSXFls_aWzWX1Zjlw23PttRQF8XrIxiC20GeC13d9JJPoFj61BKMIaYCNxw9OTVVvvk3ZCqidHvEtNb9oRRuX6mvkn0vXRyErtq5tAGmk&prev=RQ37B65C4DD1673A&p=5&pg=140) * Advantest Europe GmbH * Ehningen * October 8 Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience. report probem [### Senior ASIC post-silicon validation engineer (m/f/d)](/clickout/ac65f05e9a69fc59?ql=q&sig=c8e12befdb1ac5e6a58cafcede331dc6c153316c&e=xhqwW9nO9_mzuCjNxTDNHgfMuhf5I7Jn98tt78QmU1DKKPz9rTvwjhk8oIQobK9uOFxAnJZiLAzB6erj_0OiIctNh_j4yfldjYBCpRuSew9_oTS-IguXAv0LQ7-OSvfRydZJ1PfUZqCRfZIRzpt6Mf2vyVxbf39iKmp9vW3n67xmlLzvBCwQEV0T7yB0WQbA38sv9eHm3TcvolTQ4SOssaguiFHUgKzd-HjUv1g55Wn8wSsTPh9ftDR5WqnRhpLRDZZalBtAYyIY04aMwgZ74khxkhopkZJ-AXbSB1yLAqQIuHj8yiFWjrZ7KmGbJhmnDGQPyL_gKnGM6Z3pA4SojkSMGDIHaxUUXHDrhkM3jTn5GTsS5ze_YSIcbAI1VE9yIHgBrSwKmSH8FU92XOCyyUxfoxCJ986vFG9PHpXIGzsJIKEMDilwpyWWFdDZZ_wgIGPItoQ_lw5VdzbYhGwEEtRg0B7cvdIhgM1UWJOD1lFseQNh1bU5MLj5xyCaSFLOR6uu1c4I0P5gnO1uL09vlPtXyP71RCgPnE9oNCOX_qFuFkKwOtezonylo0YMnpXkbn3BUWVB9MjOu36SsAIdBF9iBlsMVUeaU9kMiog4WsnBqRlXSxle4kzweHIgAwsLY2lvBbfVn-gahFb0as6zb--0IocMM_8ahOgSDtvBu5PRxoORR5S9F3EUyeiRfv_ZCSGqKrsg4o3kdN0OuilqD_LC8N3VH-9HQ1PPRrZXYaje-OR0dRYiFQedtWiUCKbM0rgZZJ-sn1ZDTXoDN4sUCbzu6gv-STwLaF97kS7nlOAcNKzPhnLNtAMUhG27nBQMCiu64-I48xdaHqH_R1CIe0fW0POai87vP_b3lY096LSVr6qffuVAB3YeXgrb0tAq31gZUhT0tmp3AWTlTfTHwxsBft3XDLo1R4BWszvuaGRVfwwvVMeRv9oCfdDxdHdjgNJqOzP5RG9AzD1nCv59r44cypFSS0DE1gEYar4X1ytQRGdnthrb9T9GYTXUd2ciJN-_tpGNWu1cncKwkU2dqqNLM2A6HbyYUdW3jbxl2An3oYpOxq66_fl71BBO38QgMySoQJpXIvq1BBp7owba_74bgLK4cubYH-bDwfH5TrAA9zVKQYDwDgwCOFmTXnyFV54p4taJmX4bq1C3ziE3eZX3faYphLfLnaBva4fcTaJpYUeIXNUoDqluqM6wILqE81GXZjWt06fKfWl3JUeRME5uWx0nk1GX8SGEyMi8ZCjtE1s6PZ3eNftQgU0T3b_p1svniusU0ES_qC7nVPTUu6QapAX7Bk9B_3iPmhc2TNvvixvebG8JSXfoxGq6XR_eADLzqBBFwOMaPVyWtIPn3taX9RnnuvN2IzGYsT8fZISpF7yI9zlG-UHa7D9S8BpnuQkBFKQxfnE_iadj9TbFKIbsEys2YIAP9KgNzW7hdmtJwhbgMaUwQYLsDSxpJaX5kdJoW3x9&prev=RQ37B65C4DD1673A&p=6&pg=140) * Advantest Europe GmbH * Sindelfingen * October 8 Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience. report probem [### Digital ASIC Design Engineer (m/f/d)](/clickout/9b664bf867f0d5a7?ql=q&sig=7630d4b4c9d16fb24d7f9c91a69b361f89d06a51&e=VGi6Fq_MMiomm5KZu7qVYgeSrck9iee1a4_z9kc9HXdrfxb6YtoU1BPEE3joAccA-ddMaQICs_hlKTUPB8HUcapa617EvGK6UJNlsfrCaXlsmdOi1DsflDyxH8RD3o0xT3Za7OpaFT1cln-EAEZoE3PvCW31QZXLFmSO2NgfG55K1mR9r3zGqnGte8EkhaVBWmhjmrCfRCDmfkfgDDE_J6nnSr6A9Z0fRJWTEzMl7Qc2GiSrAbKP-C3pjKKNG-D3ombLYMv1hzt_7LtzIrRc-HQgsh1muDl32u8jyK4jfZD4Mb_0EL5RWgjmSMvyYvYzkZcNyNQZ_37N4mr0pcdHuGjzjcT_z96pngB8UBNz2g0Yvt5RUDoFTRP3DvFDLPowu98ELDMOeJJDaYMvkr_bboG9N7f86jo1ePAYDxZ8KdEZRcyJIzaLNF7hcMUvCpnj_HjoLiCWxf8_2IpTQD7OSWJyJyMY69YhzsKiKgLa2Jqpkn5NoUf7ayRTYlUuyhkr7-QbjOQofiTk4OJFAe8-kFr-US7gROXB83bN76ncjrvNq8DZTRSRu7rhGdeVYwBlp5f4zW0LX6SyJs-lcDG_D_10z6im5u9mo-Epwg4svrHsLaH7GQ0L-reoWP3C6wt_7vKmtei1im7YQsjr_q6AR3Iyssp_LvUh5DYoX4q-g-ksC7szauTTXdhZQOwiQz0tJpcddqrgutb0QBOahT1IWC66o7reHFhoF1hwDcnOrnH_P5nSBVftu3qmtBQGnO5IQ_Dc68SfhwElpwgjpEZcpcOvXrgVFaPr7NpAqMAV3Ru9uH6khrHnQ-u3LSx6r8jkiIQx88ZTFgsdpaiEoyJKdcznD3VDoa13Dfu1upxNjoo1XnjlW5WfNEAfqQ70FQHFHUvr-4uQDsrzfSdcybrBKSTodQCt40rrDIFA4LYWy77RH0v1kITLdVEcAI0iqPky8zTHA3hCDeD99_ZlkqKZS2YTzByj0f4zgtCBkuJm-_hFdv9JoV_Lqq-KgUKfqJg5qzpUDRpugVYFfRpZtkJZHkoBkVetQV-dUVqWy01jJjtOQYP0cGINdVgoJe7jFqehPx9o48P5J0syYA8deLSxT_dc6xvtiigBzCWEfUmVMgUE1CCxxIJkj47n1Dh-dn-p5n2tXtPvW26JIWfMsbtI1HxRDDw5Dxrxj9IeDnlulIBCKSmW0sZL88Pw3rvK244ttsddfa5yr_ZaD8rnIxIFsYAeY72Z1-u0ikCjZPrf3tKHlaIDRKjV7eEVJdZq_GqlgPj2bCkxywb7kN4Xsay5VaeY6UWatn_6zr6AxWvQzZMXOeifk43cLW4Ckyk6rP7TiAbpIz_tpSwsdZOwy-7JytfDJkL3n-x6obo_WlCAUSWm8jD-fOT0LIb-kcdwzli5ScXHx15o1-57ewZcOOSukgMijuKdDhvNnIciYJEpJOp7_LT16EQ&prev=RQ37B65C4DD1673A&p=7&pg=140) * Advantest Europe GmbH * Sindelfingen * October 8 Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience. report probem [### Expert Digital ASIC Design Engineer (m/f/d)](/clickout/517d23d36b3ed5dc?ql=q&sig=2a98f9eb86cebe0b4475ca22fc09992848c013dc&e=-Tp1jIYDXf5ByVR1KDyT89YOhBmf4uZHXffTFiAmw8r_0O9qz4un5U6of6_J02uJrxF1xKmoi_IuB74ibqejJ7kB_Dj5L91u6N1uilFWe-4BxA_sye06X9TWj1QQtYLCDYTKnRQSDPnIa0cCcVYCTzhQIxC3PtGFdQX75IJ6y6vxqMv1_2oUGZL_b86nckenGsGupVluWRqFmmwtSRVBDqFS63oWuYewOxCKdRfeCdwD4YYZSFGXZGHeHNB68kdZwQbNyxWtirFlq0NXnUgfdunxQlyAAFMQ6awpD5YFhdlgiACWqSYP0X9JmG18L9nxReAVCOlR2Wy9zJuTaIOB7m7p3caWx9g18jksAWI-RlI2rz3AiCreHm-r0-r9mrp1zQauNHq1ZeR59H3jyZng9HfpCUvAmK1_DIQ7FvOZ15jCNo9MfF0rb_5evg5E-QRtxIzuWkXVErSu_YN12C0eff1AdPz6hoocW0cLPKcXxhZk2dnwCxYxEP12DQplxP3CS3XBD_jlryRMGRFmrVORMEKJuiPKat2G3JjpDppt_dQu8RiYvJ31gQ3E2vThPY0a6vO_IBfxYyw5PJqVEn0L8KuITGgiZPWFaq8holQXJtQZdxzTeUoZCNVlOr7Bh8jATtvuBn5QBDJJBZ3iTGXzpwD05ldxpYvxGoP1dr1TqM4Tlpu44m8mya2iHBOIzaIe9Hy4kP8Ui4YzxFB8IuWBW9cMV_0CkXF8pKamMXTK0znwbGSShqatx8BNQoBGWwsKlhBuZmwVyR6pDCs_H4h6h4Ix3akwf5JsjDLs6e3OmyesQ3pzWAqhUYrepTz7WfkPwFWAs65LVRdGVWUYuDPHG8JFhEW6ezf_3Rct0jV0H-JdxGcXSoKPPp5MI6-Eterw86L87fi5I_FnqyCwc9nsDMm8Tu50fZt9EyABSSzN5FkZlSiunzhRbliPWh2R0JVyCzumnw3hLQ3I3m79ccdS1fOgwdMsSDOOrb9bvog1JbqiI3Lwc_7h8EJUbhFvmCtGBhWnwNEa9UeUFalTlCn2Q4sFb6T3l7iTxkAzeoYeMHBwH93OvgCDpZZmtUK1STECUqCP3W0p8KI-mTMhpB_mGq2fnUUpAOzCRU5LIk_MjgeAHiikKAWrc2uEG4-TqIkzKcv40TtAOKI7FEsQVNMduq4CBNPj31-La1jz6k63dT_eX4amyQgoo26OEeyjG2PZR3uMu8ZfBVc2I8aSPgVZNqcxBIEHlZ4LSnTwHOUeMbq9TbIbzbMujLOHP-5MIqqbEd-aikGcitywXOiEp3qMnrYsheezYJd_UNmS8CWs3jcLTHRvhD7lHXBt7xSG0LZ4CxKImheC4UmaT2qDfDdZ5XYwD1nZwrqLtxxkKId4oPge0fgRIik59bEDa-hAA1DTWkxp6IDv5IL_XoNm7hleeXVLB-7oS2gFCFvWufia61pXyo13nW3mtmtXh8F4&prev=RQ37B65C4DD1673A&p=8&pg=140) * Advantest Europe GmbH * Sindelfingen * October 8 Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers. report probem [### Senior Digital ASIC Design Engineer Synthesis (m/f/d)](/clickout/8fd5924e4b9aa409?ql=q&sig=c24cd0676339809dd66d90876170aa58b80ee29d&e=EXWDbv46CDoMKrCThOjhNy07kI0YRkD_xn9RaZbTeishMWrb79fpqmJKsSVjavfJZyPCHbUr7ZyjiKTvTuoV60n2mQQwQc22ESEAGLN2JES1E43ImTR8GPBs51ozeBcxHsy6uVYkhGi8mVgsU_x1ubHvKtoOXI2Y-dRN8Fw06_WRMjq-uGDAUQ7kcgNQK-T6HJZXViWUleDu_QUDXxjUYLduO6d2CwdxsX4xkQ4aIidOvNJxiFzFpahgd0U8hgPCpjNNcc7Lc1aqZIwEgN_d5XILOr6ghXiClyLna2udefm8zgM52N6lKzQa04Bx5cyLiGfOzL3P1AAUvEnMWmBP39kbDCoAJ0Tr4Di9BNOg6NlVMvMWBttc0MXWO41baxU4uKEAsB-Ed16Z6hYZe0LJE4DDohqETlNoNEQLRMY3DO5YMH_xTH7awYrCYOdRjeRUnvrjrNO_N6nwEJ76bJHtbfd1DwGdqv65YV0XtVtoIYgMg1V-0VFmsgfBWvIYmoUfGx66BbFDDKApY8WGe5SBfvzROx1WKf7Llhp5YEQ3bM19cPNNHLCKWBT_iHh_kOQ_rZ5JvuKZS_i0aDtKgfwnACm0slcPJz1kIV66Q0pXBgWWRJa6VW4sBgQ6InFPcbHm-scE3Am_55yHqOKauOxo0FPP--Ui20FzgueI1e7H_CvKQW8QBUtDxnozoL7_gwkkfIhp1h-nxUKuhdniowfhI7YR0bh7VGFWjuDtyI6iBYMECW577re9D16rRW43muYqc9ISSEeEQIHaCAiNMda5Bo88wvo03ldZpuJeXCUy_Sbw2Y25qsjsyVmXQksHZ23v7W6p05LsnK4srpGQgvKnkICYfOPAQF5Jwd_7XPOIT49_6UwNxfrTTIjpWojbhIadSu4AgMO9dC5HNoY6FQRLa6kZnIgvccZqel8kUCgH__DvR7F0DBBIqIu_DxvcGHUZGbxAzM2U3nrAcLfNMnhsTNp-DNeeMyGLC5jsgdSPlRlEPu5AUoKAtPUxZ0q1Sjf8g6-u88jpwJoO0UHs1JqbQwhk-yU0PH28h_AiipFZgFBq2H1rgVDmyK_E8GSk7-vdUs8D2bsIfZL8oMPleFZe7jL74iNlZ6br68j5ypO-8TrIl3CNXUJkzA8M9BiSVoBJbJIxwwwSfKOSSqACZkBW7D36evJPTZcKxuhMyEsKX5LbEQd3dHou3shwoRpsQ1tabgCqI5WHQLHT3gMFTB_UczrfEWu_VgW95XkwHpgYnHnJ7Hn5NJluxxgrFwP7XeU_iDtL8iyRv0uvz6ej9wW7vV3Qh8qgrp9jjQWJWpwGxoJ1xxwIJcBeBHLZWOkT9MFp2FZsd4yFxIHhT9cOEtyelFoRxvv7tr3JUMnCj3Sdqarra3Mg5cRV8bF3y3XSPWsn-gxey2yx6SRo08f7JkiNzz9DzTTEqE6rXSud-11nbBEM9V1fcLfN4bIhMPmKyFnAiiI_tHffBg&prev=RQ37B65C4DD1673A&p=9&pg=140) * Advantest Europe GmbH * Sindelfingen * October 8 * part-time Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs. report probem [### AI Platform Engineer (m/f/d)](/clickout/0deb1240b5044e67?ql=q&sig=2242a6b9e682ce1fe1b13d8614c59ad06d2a2bfa&e=nuOwEDZNcMTXDyvydwq54u9eyazV610CcmDzSwtHi4d-lgoVQ30_meU921sOpe1agOTB81MzIqegO1yCWNo1l6EE-kRVd6zddFWk1wpJjUZv--H0ow9wp9mhOC1QTCMrWifGDO6rGRku4Ft9XGyE4GK33Th98-9yYqVTsI762kJlBshyM4xvd4h-UVSvaUgeGLaf4RssxOOHKd_HSjIR2dG6UjstEDkmorOwDyjrtvstWY2LEoxCAeNR5Ey-1IKq6AoD_fg5EQLNF2swfkDQEz7QH5CBxLoTQhkhdmdTvDN_WS93TtQ5AgXfMkUBo1ECzdwCUhWkhpO8xo6FwMmBxs_61qbWgOz9N3MHgimuh-bMXAteHr_0cCh2akSj0G9f08-kc5LN5oY7OKkjb71G9D9Lyrxy25m3G7R2VAsxb20Y4l_gkQda6pELnPQofeVNbmqn12XzHVaktju8-dhONa8HO3-TC8JHZNRo5hDbG2waa761JPRwZ_-3PAg5ZSsMSFCxvCWiC27UY_mY0DJJeca9KfLUABg-ycWlYbyX5UjoMxGUiTk4m_jcZQRNZzLSarye372uyF-UKeeCgnl3Xm__b-CNUS0PnBjYHUEmpwRSFmUiXsDOtqM5gqKoOZcMAYpXPGGqBiN2jVZNMc5mlidkbVkJ8MLybTujO0vecXTqq3w2XfaK5WYTMIVQDVx1UyWmlkSRDNmtZgUAcz3UrdSuw43h3owVlXrGO2b6OeBPgOtYDFacTtoF024BrRSc9HCabQMJ6Qu5lqtLnVOOcIevUxsfWhKe3WAoCsM_zSc-UdW35m45c_FrvV0vANPrV7PmajIBLCaDLw4IToP-kSZngCkmKe7EYAH6dmeZF63ipYcsR_bkJlp67Gno3PyS014vCP6wB8NyBGiXEVh6cpSRAgj6XlluzFJDrgBkYVWF2X80t0omQOyXnk9szbbYwP6XOQMI94y7K-f03OeSZPH7G5AxTOyJWVTv2YCn03VRxLtP9-7c13O0vIHDJqP9wwkCHczy_xJ849PBDGky2vLTGXJlnSo-6MhPQgF_oTmab71ZmTzkpVBjrskOcSmJBtdlz9eTbczJuIDFDjT-RZnCCmOYmukWZgLb4PzKt9pMpc6qUQL6gk9NtaXU9F67KeOE72hxwCLWwrl4w3aK8Vi6uXnhcWMCQATe7pzkgf3sywzhrBJ3dqTVmFdpsCxDuUewHsO5HM0nnDealtQyMWnbDM3Oy9kjnjUWf9r_BtuiMAPe3088ML-Gf_EHLstLCDNYkLq7nYPpUfjxrLy9Y_9a8YA22HuwprdRkZqwyRWVBf1vS7ymD1gckP_X_1-sITBuZYlIEgvt55K-tXQyB8fz1Pa2S8gD-w5nZjpmIbBBlwnryzs2LAbVi7GN8TN-a1ep_kU9dryredxa_vNcwvG0baNpkq669DoH02QvUGo&prev=RQ37B65C4DD1673A&p=10&pg=140) * Advantest Europe GmbH * Böblingen * October 8 Own the CIT AI platform's operating model, defining standards for LLM APIs, RAG, and MLOps. Set technical direction for engineering teams and partners, managing transition to production. Requires 7+ years in platform/ML engineering with strong Python, CI/CD, and cloud (Azure/AWS) experience. report probem [### MLOps Engineer (m/f/d)](/clickout/7462db86522d8489?ql=q&sig=d6a9948b3c39b62e1dc52dededf6acfa027873a2&e=FtlUYbvKv5AeB-X8b68is_6jH-S24rsfH5EUZR5Fi0fSv4NfuSMlq4ZwcY8tJ6gsY7feUbdTD79MKIMnRwv4IWKybIcrZxIdoGD8uSdthYKO3SViUpaxLnn1vNCoBV27ZJb62zjhgJKnmXLc8o0jO5Auuw3fnik17_7eqbSyzLS8uBY8c7lV8skYiX8GDzhqWc3d_-60iDEP6D5hcQ2UsQjiT-xT9U9vIgGvBdSTp5yt7lTPWDn5r2ESQET1tV-RlByUEIU_wBhPgokHGv6U12-gAwCoAo26FkYisarj4SJ_uroZ8twGQ_KlKUbYiicIAj8wK0LGRYIDovHsDQt3PdHrFwlrieBCnhZFqoWaLT8Hy3hTnTJddptkCrr7d4jrJ05EvZRv6DJ1caa8imdcCEW3A7LMTsy3RfO-eAcRbCfIhAs9ToK7wRjvRxzQY99MYUvT8C5H9Wg0ZF9YhjzWCz6HzHYAfRLhfozQCB4vaQsm55UCSSgRpM-2H3SgtVGKzvU-fPqvOKy_jNINWcwzsflkIXJoP5XesC13--JKr0sOPBlcfANGhfmeYmQJoCGr9bLUhLnNpRBCC6MCxsav9bMECXUyfyOkXUFa5v7SDynEZAWKfko81is0hfOLWzwjrkU2Jn7awSWeKLTgj0OEe4iB5svW7u2hRsJ6HUZN8HYRaqU34IUQi4x_4qYxzwSrVWqfRpZ0aBamFGCIVMJgUukTK2CJELBMxuHOKm_e6v_UJKNyrfe6JKlbOHecUKaVYPU9I_cKHOR4qe4iv_VvuIG2MzvHN0ZRq-6-RXN6WevqsEgxyJFLolnTmQbWnek9odpD028y_OrQkYZCIpA5yCAMSvsk9PBec86C2e0KBgVGi9_5hRHwCZWuC-N7xaH7aj0njaKwP1ao-QCoPijMxvogAQ9naWm6mOKoE8w7SCjUJETpw7mVfeWI5e8s6pQ5oVDdhNgzVJE-5_nOVsKsE-c8TZE7zpAo6qadUkOTxhGrXGrhylxdq7mMD5msKfe_Gswy7HNC-J7_MUnZi3A2HTZDuSN8GbFvxD-IMN7s64wY48ecaOJ1mt7tdRySaQNOydSuK3bTqkt3_8tuygw2RuFTQvz7uidsh4NhVAesg5gmSSW9-Pv9hwGi7BG0bRP_tz2tnfuKSmoFaOyA7lSb9dWF-jaLkNtwYmLVo9m9yGNeorAuNUkY9cqfr6DyWeZG0-zdi9pYdDLdbo13LJqmB0d9zr07YjLYvgm3TkBK87iImQc3nrHAt8u0O6Rk9hAXk1Ja783LVSmINrFqyiKwwBMM33ZGHbtP1HKsbWSrC6H6OXH2WY1hhZBPuvWcseP99ekGGyT71k5cTJFihFo3M7vDrVHjRsBLcX2ziTsOutnpQfXhgSpciTQubHYFi2-uJIlrXMSLuZCzDtgoYQ96JsPozk8if77ydfs&prev=RQ37B65C4DD1673A&p=11&pg=140) * Advantest Europe GmbH * Böblingen * October 8 MLOps Engineer implements CI/CD pipelines and automated testing for AI/ML workloads. Responsibilities include building model registries, maintaining model serving, and configuring observability using tools like Prometheus and Grafana. Requires 3-5 years in DevOps or ML engineering with Python and cloud experience. report probem [### Service Sales Manager (m/f/d)](/clickout/c74cbedb75b8d7ed?ql=q&sig=0fe19639875d0d160ae42db0c3081a82cc1486b8&e=-Spo7dTWVA3W-NLJyAtefaG_zzNYPL4DDcH1fv6bhSWlV6zXCJU8Rj4o7BlugF5Cg3VyB1KTN9xIf2frPcKf_qyiaVb5gNP8lT1IqU-5Nb1WYfvfBzx_hZezhJuiLR4fmAc-Vts7t4lB-gpSaf-GxsKnPVjrX0niwbbiA2NOIuruKDkI5g4qSUC89DvtmFVNN2j_Cn_SEKP_j8wWk6cfLRSZ_5rc6e7CwSm0u0w_Brp4NnAhHVwiyqbU9FQJKqlivaUpTbETQ4PbaF0GV8a4DdHUR7XjOU1tCfQoj1yrV_y4YWgezChAmkel44vp-VcjwgciJ6XvlStdG9UQ9_4J8UFrcA8vRpwk0LmIj717wRJRs0cwbr-RXkdZH-ZStRq7QrYfEBcRYgEOqZP0d9gb8ERipcXpmjNIiPjUEJQMMwMhxxXXDMJy4VS2QxviqmBTcCPkQGsqNpohYIxQrT8wj5FaI3RapgzY7_GptBRnAZ8s5FPY0UyyBg63DQq56QLkiXUu1hyp3ZxMZ4RQOpk8zGWkaAiU2IIy28O9QXror595taJnG6eXCeevUjDwp7DBdNjl7erDrGwzab3G3qOLED5yEPr8Z2kRdojBmb-lfUTrzc0m-MgUaf-nN0vIzzZy_rju4aO_hnhw-gn1b5iTTjzJ3ifRHQZBP4m-dohTD4Th3ascEAOTg3qzUORJCY8MFyQIfu3Ebp1vsE9paHp2IdC8XOCenxp-FklV-KBKwMrcF2IHrKqyeOrCHxvb75DiB3GV_f-6fJ8NhAYVqvnTUaVh-FJMJoDV-CGOwdSKkacI_i_NmKtpKWd1x3887TbRHwiOkWhH3ZF78bDhlc3UKfxOa7JRytVmaA9_sqpswWg421RYNtrX4qzdMjTylzBLiprbTKvuf9-ayCHGg1qhaCafAYU_3LNF0l9DqGgrhZzAcAN4G0yQpdY8SDpD6gwmlSD-12JM7zptt2HXlEAf1vrtx4Ro2FSje7VqroUNPeybNaKqTre8uvycp4t0nMbeiDJeo54cVXjOlnnZA4HP7KXUUdcIv4tvJXUSqLy7NBe3G9DkMgYUkxJ-wXxLIl5WYtfCaqLQi6HZ5p1Y2KuctEEy61CDip2Ahd_G8c6olhExg1sJN-Xe4VLSbxMEE6xIfJ15aiXLGFIk5dzhnJ8P7lL_aIFneGKf79LuIzAENS5kAbQURECXA7nMGRHZhoq3pmkxcgB_w0ITRXs8eMi8Zrf2Dy9FcqMdD3h1_1dWhUUQYG3FsnhfiHyrAPmu3Z5Phf38_19wC7gIuhpcTu0kxcaOA4fKuYc41rl7aJVoh69nynTm3jCWVf_3jTrKMhYQVbiH6rcJ-kLvEQncigHHZ5baBxKUrKsywErydcDuW5QnXfsE9iBoFilt0NE98Red0fx2BmTK5da4wYqLYXb7lR6FEokPWCMwOzsPAOvgnigV&prev=RQ37B65C4DD1673A&p=12&pg=140) * Advantest Europe GmbH * Böblingen * October 8 * no experience Service Sales Manager drives sales of Customer Support Agreements and Production Value Services. This customer-facing role involves developing sales strategies, managing Quote to Cash, and building relationships with assigned accounts. report probem [### R&D Software Engineer Maintenance Framework (m/f/d)](/clickout/cad8a5e6ae1d5e7e?ql=q&sig=dbccf63e32ded19e1b7019bf119a1fc4c8fa4df4&e=kOZqMoSynZLHaKgxLH57Skzub17ZHM5T1QEpUWnunB6HzxAtR4caz2N2GRzIkViPJLRwMB-dkLEfV8FOQgDwpfDj-yT06sEJDrdcE1lM2SyCJXuoWgBe10R9f1i_BWEr6n0j-dEOlsJJ8Qe87JHTMlcrTru7gEGviGSm6PmVoUJ-zO_mmOrDjKgTYwylKZ9UFN6i1MipTSfpJ9naJjDTqRbmE-ANBdvyLZvJVVFBK2IGJUn8dw--08CIdADk2nkoFQMtziM5PDCDkKNyIt7OW22EX6oktZpvCCyJc1y54WFxBcD-vX2oM1qHRco1j11naQv8YZ6j8hEaZjsLc4a5uhbgHove4xDpJNtip2HVv9ZoC2vRA0sM6TTjNls0woFj9r0PTm-386tF0WfCs4BzuZohGlCOY1nSM-i2GGiG_9Mh_hriU0LeelkkiPigMtCAPhTN6wi9TPFrbZDvzctnuUx5F0aQv_xXC7KUYDhTK1go6vYtlXOJEr58LVkBQr5O3jNzLZc8IZh_aFN5EzBTtvp4eVyK0vwy0JZrHf_uJXzG-Y9b2U33AboSUhPyYLlCsFyYvPgwz2vHrtglUpfIEjSr_hXtzfxRSDEilYqBRyDWDXZYVsQu2YW2o2nm-CVZmdurVZmLIBwVetePET9nIPwL-iNe1F2gsGfhTjm5gd5xu3QT6535UEK4CnIYHnm_qWrm-0spoqkVEeRUo7hRrYlAu13E0IRx2loKCaVbYms12BvsmPgNweVwiRtY_2rzRLiXqrt4MO8D4tm2zmy7jq3_MRID3ciB3IIPb9TNqmgaSaGFCua0yLuISWdfChU09SMb34yfj18FJLK8j1RrUxnj_UYM-ZURmcECMP2dMBQC0rSDa7F_yQbcS9faAvkyvulI82Y57PW1Mf37T36ARrQw0UUA7dJR5aocM9DAGnq4vD76Y2HTp_hTyf0zWdNc_WuFSEarqNw1e6Mf3VjzakhaTamnBeXXdTtxaLMEZrpaPvChKusCVTfeJBN39gWxVC5YDOENTggnLGt8gGz90PQwJsP4isi-NMaT3xl-o4gepTbq_M-AohlQ2l77AUEKWP1OM0ZGODAzX74jDaV7CsG3qiJXmwOSlnHLKIlhqNcf_wqnQn_ASKXYZShJ7L0Npze55bEytS6Qz0D2brf3UMgKnU0nREAmB69PO2YO5jioCLs9_8tqs8eGrX4aK2fFs_YY45CxHVqKyMmQhOEk35onQFk_XNXL-X96jmELWha4qTDGu9ShIJSkCNJWyAhpYWD0mX7JJZhi4zQn5kVDK84mKxiAF36KaN4pdlKv7T1FhddoQsUS4HXfFktclNRXyLjgDVVDd5DYdPkNyYn7uERrFcv37_KdsB8-rTIILNqgTs42ncd-MtKKAGSJcOSuNLLOFcrTU0KzrZWRD-j7VYl4Z4WtUdhf9Qq--7BrnsKNIQzdOukNwPdd8Dx1jCtdN4Siclxyuvg&prev=RQ37B65C4DD1673A&p=13&pg=140) * Advantest Europe GmbH * Böblingen * October 8 R&D Software Engineer to design and implement software for the Advantest IC Tester Platform Maintenance Framework. Develop in C++ on Linux, collaborating with stakeholders to solve complex technology problems within an agile team. report probem [### Revenue Operations Lead (f/m/d)](/clickout/3967b14c96156c64?ql=q&sig=6399f87ad40c46385b846df662deae4ca933dc4b&e=QWuKXqVYZNYO-rhLaLsQQsGJwKgCPD3wUbY5rfUcT5tTSAN7APez8W7ePls0170q-stWa7L71-_wGb75MaM083kzRFyeT7GE4ZgZJkKcTe45_O_bsY7DWW1iaQcbRRzbFzTNJKAx1JPFHr2WoqKu1HEa9gu0BxU_SaEXZZexSInHJZXOZs-tmmiV6NVL_zcVvheweTJjUG1TA45mRdN4DVDFN6vvS42xKwnPeKUNSx8DkQb_WuMxJ5GD6XBpblE1o7_PRogTZ_NIg8o9cedZ-DsCHdSDlthqr9KXObCd2Jr6mUUqmv4C_mUpXlcFY8ksG-JNeDSssGV6TEnfoY1pP6u_FwU2WPQW6FLF8BP7zgZAYoKlaK4fJFr7coEEEkggDiI_YFJtCBqC6qWuNGSiDP3rCNw21neIFZt0_U_XhrlUx20eLDZbWw6w6k8bHnhlMLxb_w5Ji2Js8RzJokRYZ8eIaLxInzgn2FImwiy4k5UzrfmHsqjqbEIx6EU3k-RROU1mj5VW-U7MqzUaW-KvhPQq9A5PcRKGbRKvIQrsZjXM_rx6AdZrVh8U1_Bt6drqsxoqDtk7_jWD1T1e8DBe9g0bEAQjQZAjt0kquVZSORdkacW8mRqWbhhlLNa4hxFyti-vBy4asnReBnq-hsVQIl-5OYOeeLtluq1aGe6a_bK_KEeVCLRUGRWYL-WV_qa5jN6OtlkvJ6migSAoiTZc3kxoL8iBxTg57U-5rpoLJfB5NBhWAlRAWf1juo3qVdZnDjzGT86PNyyH59t6KnMuT54m_NVoPGtBvjLKZZ_I7naimrfgakEQHa6SsO82iHkoBRFnmtn4MAWdoj3YIU4aayfTcLxsfDMf-EjmhGYPZU6rgV5MMs5IYD_Je8E7pbF2mdrzLR9mTtyN__yaMAy_oaWqNV_KQRUP69h2-Utdg4aUoH3EpcJM5PNu9MmzaVs6tfS_Kh80bHKW62GCY9YqqbDxVsZoSUUrzqCD0rGXpsDarKwv7LLDkqvnYYBpy1QRLbIaV2gYLVxtbSJWDPJlLdSZhjTnwNkEYCX5rDwOSO_DWanA6EiXZiKD0E8sF72deAA3FlsAmJBGrzJwUAJgFZyJTYTMX6Nn05kMSrRqpTw3KyYChK6KIOymGmj83sn-7HP577IhoGGrlx4Q9YemHlif1hkq1vX2wD697yF-qzwJLtZ2Vd5iGkcX8nh5Sd5kMJNFpohuTrlRF2cmTyzFx_scGXv5w-4-wyW2B1eHnzMfby3YinvcdwkgKFURr3Ti1AcUXfh8ZpCT9h2sOy7yW28ftzd0VoLN98VfzhUB2oMRTxHFC7FPR9vetTsQ5HA0-6S1K4THm2gCm42IIWPy7q7mEQ7PhYEuwrcxPAKALz6YwxonVi137h9ldkh7R_4ybM12MlnJ4FSzhZxp1pbr2FIzTPMhXZKi-r4kew&prev=RQ37B65C4DD1673A&p=14&pg=140) * MARKT-PILOT * Stuttgart * October 7 Drive revenue growth as Revenue Operations Lead by optimizing processes, aligning cross-functional teams, and analyzing data. Requires 5+ years in Sales or Revenue Operations, SaaS model knowledge, and strong analytical skills. report probem [### Cloud Architect - AWS (m/f/d)](/clickout/49d1effeda6bb383?ql=q&sig=95b13a90782afbed806ce6a10d2278ad04befedf&e=rjBqjTrC7jy_MjBZqvyvCaLtGJ2gj2B5bax7jxScdetjmQVq59m01NiH8jRf8vYSYizRvNDqFlYfpb4HgDp9CEsScVgf-TyOXpeKX1rnNweKVH34AyiJpHEyOXzN4JVqJFbPwLE0cdRM5RRDnGLGEAPydHpA2RZmSAzntgyPAox6Up46HVBOaW29a_G08zh7dMDlD1_mJ1cWb5gan8jdsWQmhV39z23ns9ttikfH_RitlOsrReyHePN4jOXnvOi7jxFlOQW0oM3e4xgqpzOQnEHQ5kKTvE5XJiL3S40q9P83aDmaAT4ipino9dE4qhvqjc9fzaOragyy7OE3a3ewu6PFb6XkOnudZJOtsN-m0xZtQpFaI0HC4IUG-XpUcBQEYvrdhQn68CAfkhuW79NEN6p6pCgzgYXlcdZoasmtF2NLMGrzmJ-HgDseS_OqupN1j7Zm5XgrpXVviKjrOzX4zpqKBdT7I6pik_PRQiRBL1nwud2aYh17NOQ0XyZ5Y9PGd2-ugtV3naljcig59Ac62IEso0iW5x_4TCNaFwzv_Z01Q0Kc7KVqUSrP6QPN8cTaE89zfg8HoB9hQZC6VmG_9n6xtsrzmRAFEFUqtR85N_Q_0wPZVuyRBqLYvpBrLPwpfZ6xXDrMxkdQC81qQRyyPjYvAR5acJp1zeCOcmZxNknKyS_7BhY9Q4L8tOvulCu-bR5L_Doc4hgXSFp_dcv44P17-Ougebtg56ONgSmN9-AePHHncNUFDLOkrkpwekKDt1TfG9Za2SClDQ7Ua_NKi7ApUkZPu2tloT5L08Ic9z3ICo2aV9Z_m5LNC5KUUD2J2fPw1c258wmoncXlAMxrSeoOZrQR2HCtcr2q1FNl16mqglgGWvJDILySx6y3ABImkFlJH4lmH5OVizZednXufCukDSCgXEeU2Le5aDKfVKsq1yADgrIz3lRQXaWYoRt67xvPY18vS0PeFnxJ8fzIWEcAKs5hPrTXYtc5LGs_KWXKl7DGG1sg_PCuy-oXd32KxzsbUuimcjYzFJ-g6H8XhvyjyV78AR_zG7gZBG12enKtbh2Z3GMHiuqUcCatCrRlPEfw27S7kqz3RtFg9NPQNy9hi8MnxJW7b45Ld9erze0wLsqO_zUwbNNL5P4NbPQm3yDze3JFcOTjPm8Y5OxdKA1IAh3l85aGyyB1KUEaY3ZmSct4RWazRPp19Jpfu2PepybMj_k49Tq7EsWbvtdg8bbMUel16OwIhgkDOUxeBvNIKJpkjPI6kLYPqBGYAhrueYFt4imwoP7sQvTjxeMb8acdp34x-Uy9x5Z1atbX1rG3xi9G2TJxHfnsBVMHy5vh7vbZ5-q6YNx0szXul5ILo231AZnUTUm0d9LLl3Ph_zvfMY4mRafMod0xfFMQCTiy1mJCHRQ_TyELxFa_Wa_LOWhknr4r-4HcJmY&prev=RQ37B65C4DD1673A&p=15&pg=140) * Advantest Europe GmbH * Ehningen * October 7 * remote work Design and maintain enterprise AWS infrastructure, defining Landing Zones, governance, and security. Focus on cost optimization, advising teams, and ensuring compliance with ISO 27001 and GDPR. Requires 10+ years in IT infrastructure/cloud architecture. report probem [### Cloud Architect - AWS (m/f/d)](/clickout/4a7fe15007054813?ql=q&sig=75a1356c5f32fd30fd591772f090882ac615867b&e=Inr7mDNe6DMO30ND-sdsidNKoJ_Mb62JZU8DmfJoQPiy8vX_LdjKumg1JVfkfN7MTmh1Z5QQ6KI9KZGqOekcAyxxnHBdTwOr46mu2TZeKMtaialxe2hAHoV_W93DS1s-WCxT0zq-lX2nKkv9oeQXI-MuxTQw2EYYEeE0eMzH5tgQ6MgtC8y7bNOAOftkIL39j_Se8o1ERqDtkUiQVd7ydcGE2irRSOL_Xg2z_JcEA71LEdYuNKacAtz3bCZ2Dh2PjE6tVZoUqa7Ohi09MCQy6D1uZkC7fzgwhqkcMpUp4fDskLX_aX7ACu8cb7OC5H6BXEFnmCX-79IZUEc5zBi9q-61iOy4OfgpVWaedCrFpgcIeIwLCGIOGKkI7UDNhCeMXkGP_I0bOIHvx8pQv9vdUbeu5fV9-NeN7GR_L9BIRRWKVBa9hmK3ab3dB2A-6tLhLqXV005UOycvhlQo-8JyIqddJzMgcnoxDB7Lbz2lMO3Kgsbi6CVLxYr6mceepxrqbj-4ZZRRLPebxBenm5_2Zw-ewTSZqFqdaOuc1IGglKxctLcSiHJHt9myP1ul2J8XQfS2jOuuTApPI15S97BFDNHQwkzYkxnuRyMYreHOrtABcc40GCNgeQ8Z5xqgsg7pSM6fCchKDWZ4EmbNx2UugyjtSergedp600DZjsZd9oqaUZPcA4U8mwsWAkNoOUz2tcAUhc56n9V4KmpsFgVD0mg6ZLfEQHylY9TNU5aiXQsYZKACBhGLRtCkKW7C6ruSwtziCw5Gz1YIYd7lk-R3fTGr95XMG5cQNtIJOoI5hty1eiJ4azUMaBHMp-EzDxdr4EJ07k88oW5sYVyuIOqkUIgwhvjrQo883uE9XO7dzNBneXox1cXPlN81TfBpHENqbs2YJFLfphNX9-8D9T5HTi0RII7fVpK2FgP_9yf__4hFEZf_RLSp_AHs8gqJ2fA13h8GDWZVvOnjG-Vw1f7x-1LjIjjEFGOatEJpaX-GPFlNEPLh5FRuknB489hEmH6oWWR6bRcUIhXPIto11aoEWY0ShkpzvXhAHaRb5Xeqc7kjrWE1oxz95SRSTmJkoYUrotnF7Q6SiX-Ef8vzHDR8PVGl4ZFjVWPQGbffy2Tn2d98Ymio-inLvzNwITA8Dl259-env3MwFDmjTclFogLvYw_QUfjFnqMq-3xgjBrxiBgda1anml23Nmrv7N1SkA81Wz7JV3QuMdDJq9HniMPrpJJY9blx1fBIGjdCKubiwBuRm14SyxOJYoSW0FsdKbfIFpG1bPoz9fBiQIUY4VBYF51vHN40Ml7OCJDiydBwT66nGVqiRiIxs6_AjcB_tQCuFZ4DZ46r0k9QxNsGIv2smiUQ1xOcHtByVy3Q0ht3HOu_eMAsANqi0D1ZuFmSxcmfI_V8k0U_iIWtuGF_E5fFZvyEWiZTHFiCi0Rz__wwVA&prev=RQ37B65C4DD1673A&p=16&pg=140) * Advantest Europe GmbH * Holzgerlingen * October 7 * remote work Design and maintain enterprise AWS infrastructure, defining Landing Zones, governance, and security. Focus on cost optimization, advising teams, and ensuring compliance with ISO 27001 and GDPR. Requires 10+ years in IT infrastructure/cloud architecture. report probem [### Commodity Manager - Contract Manufacturer HLA (m/f/d)](/clickout/b5d4487cf8b10eab?ql=q&sig=a0d7262e855d2ecaeb0753711719014f43cb734e&e=j7EJEp_bKzvRt6rdmGMNbKu_GW9HLO2akT3QRym3Rb77WRc4h9hYuvbyaJx7iemdAVLNflnRFsH7wRKXjk112gN_E7sLJ4jz71GKESgi0op-TyYjp047jymiwACKSyRD6wdncMOuXRlP7cemaOZe1Zq0jQJuGzAZU0t9vvaTxBAAdEMi0KEITSsDvmzPd2GQ7YiNxl3WI1lweZgPd39rUrZ9Z1MwALEnGWnL2evX3uc68qI7kdSzENGJGMY32hZpYMw0bjs4Cb-oBad1XdNS0wvYFZorV0-zbHUeEYUMntEG_n5IUrybxLDW4hV7P_T2gbWYCwA8IUaLATnCH9hm7X-U8jg_R-j-HKLft-qHdLzZQkatZUYicFbbSu9dqgocVBv2JiSqtz5NblsZC8Hm40kzcfGjNj-40-nCy7VH0VvJHTr9xz8JaDO5EkSnVX49tLbNZMLDa5r17B3C4STYaHrMCGTENEluhCWuBJdJXtI62ZSqrk54__I0rVJwqkX4ZS-L_RW9AoR_SmkkSChvOEQkIQIjvYamXxSQnZgqo7NuK0argy05GLNbO2b1Uy1mZz0Qac1Id151G7CTbOG9TNVHn_9tNwvK0wGdgOybvXWc2umU0hpdtn0IEgzrr__06Od2izMJjAKeZHKCU5kHlQyBmWdBcFw-p_Ra1QJWkJf_h9zZHelJyM_JqtjRc8DoSqv-K9fAJbzwrYY3hTDWrhOMInUSlw0VSHyfc9CK508U6dv5aWhvWTDl09YzRNwu7jjU2tNhI_tPw_BDQC4w7tgW5TMhKmdDCsTQUrRCtEVjm-zdMSfPd7intfXDu5aTqHPPlb3wYqO-0exJYTZHe31e2_A5LALYARCyWvlqUm04hyPHkft5v5N64Hz5EHGxzx8efiN3H5ilYkUyUX-gXyb5CAIHZx0d2Fa-6kFHvJFEB96pK-saeqK9uuL93oiAMMWeD5RDD5nQeWjzAFt7nlPAy4q883RHBP4SWJ5b7LVQpOotYB_FCyjiBmeg0jH1cVvvANt7CmsjsCGsIYiQ0ZzBR1IJyavKe2G9ycwNfnY0BOJD-iO3v0c0wlDVuL9KA8i-rg1bboTJ3N_-oLggUKiGklhQN_PjUl2p9F8u1pNehXRpm_K-Ps_gta37PTpVEUa1A6RnQwETpj8qRfoiXuQvXAaO13_eh5W-FwL1vakmkLyvtNVDORaZIi6YIbE8kpVnYybZMHMN-FniyItGOLuCCaH3omtvNcCfgbMv3z6eXwfLOO0pVVIf_isSw_LpX97xcMgcVOKHKyV-UEUOKz7IKEpI7R85rNmFAhE7zVqO3KDhyciu6XRoNl9BwKcCVz65jHp-CWZFN_3dfOQduy7gBqjcUSW4eQnFcYSy4r_UzRmMo6un3HHmR_JZXxjCtZOTfZ2HARr5ONKQFPRq4x_RUDvEn2Nl-2ph9T5cJAszwaMjVz8yslip4KcsUt88xhvsJY_0RNk&prev=RQ37B65C4DD1673A&p=17&pg=140) * Advantest Europe GmbH * Schönaich * October 7 * remote work Manage the contract manufacturer commodity "Higher Level Assemblies." Develop commodity strategies, monitor market trends, and optimize supply chain efficiency while ensuring high-quality, cost-effective material availability. report probem [### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/cd64bdaf1efd15c2?ql=q&sig=1e8a345f305b5811316ee0b280ec7c715c4549be&e=zOsCU4M9BpTuNxwsDi-W34dLoDC1Lu1CVBGFe5eBMTMZ0Ht_WItUONF6NrGNOEq4DB6ujlyhDTJ1JUIW_3mMtaSt0HeEeLUkfBfIaIaOTS943snYuyd7_RxxH3Pv99IBIifdj2VMqocXtdl1E806d2WysQjY1xyzFnVkUXd3RaDn9YT95j0Kk_wU9rsnGI5E63IzyefF5w7wqZpxArl-wPiuZXaOwP3EBK4_BLM9_IWo8DqA6s8b9qApNc-HPH8TZ1tgknEDA6dhAHAoIQRp3QWAofphMmyaj4ei0sRYd_Um7j21CPxiC_js8nFGteJeEe5h7ITnEeOkLACGCsqcihQT44XAeW6OrGpM6WM27a1YIJX9paEEAF7qt84W2RXdZ5C617VL5QmTu2w_h4ahceGOlGQdw4tRP9kTuycoOjaThkMGW_fOnHnUR9nTweAUhLCntYFvSugBInXCLAF4dC0zFokjahdlVNRwkojWv_aRYMfvXENVpUpwvuYlScAksZBqdhXFz3W5PHMR5-99Z83P3mlEDpixJc-h145wCbgp7L5iXHDLzqjA3wOFJUH4y55uAUGFKXUilE8tG4rzi7WFdDneX_AZDybZ0KJmM5V6ETYqt11IhErqpcsJkkW3LeKjeMH5ohS8bruCxvoxQgCD-87qXb-8VdkKiUZhD8-UBBhIXFv9pGz1B5gX-0TKE8gvHDM2pbMP-UT72--9LGERkrR3trluODL8dQ4le9USkGjhBkQjeDQeV5kcTuTlqFgJn3zwG6Us3n9KiUFbcBR2cgwERGp_E4PA9JCEBmJfYojFUOu-bfRmlqCFOBnlrDJ4FDmOMlRH715pkNPBT91yYSSgiyn6BGb5Iyg5gvxJlasDWqMjyGipwGvpumqMjbiw9AdWEyTH7gqCAyqQeXLiTHjFxqq0ZbdzypdYkAUbc5b-qmRAY_9xCOYKJ6QkJIBu6Yo59BMcc93aNkIH9bTNkAL2Gt60NsQ6IuvHatpaIJO2iZtP-sJO7GbQ-Zq6CUYBXQvO31MIMURv_6pcyArRyQJLr5dVcXIwrQk1bv3S8Fov_K-MmHPFFEHxvF0ePa8bbQkqpsy8XcAgGNHN_LqtuuWtj5gOnkLlD3YKK0jsh2fEZnnfFM4GlNe4Fx5LNbSfJtEJ1zDCs1GSP4LGImGFXPOwYxbfEH5D2kHLK4k61GK3IWikwIgjg357TVtcKENw5cW_8ssY4_MNXn4LcxvmAjzIiHvmln6A2iMBvNJ38nrI56Cquvd3KXOgUdfPhbVYTZ52Kx7amG_KsjIJcU0hOeqB_Qji7_1NBzT7pROSiVaoYXHfIB7uP_XEDWj-Zf4vwgqZLSDsQ6IaI4Teq3Son9ff36xYYSbitxaOj1Xyr2vj6attRwccDSiKGHGpflgtGRyUzvKKNR_RXsnVFtvcKUoLfh9Feu-8PPQJc5Q8cSaEGi8vnQmFg3c&prev=RQ37B65C4DD1673A&p=18&pg=140) * Advantest Europe GmbH * Sindelfingen * October 7 Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS. Responsibilities include simulation, verification, and end-to-end ownership of complex mixed signal ASICs. Requires EE background in analog/full custom design. report probem [### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/3dd2a3294a20e3a6?ql=q&sig=2005c86c35c5539d789313bbdf4312d58fbac067&e=Vqub7b16Itras1gK1nfJu3ah4XDudgAAvkxOZKxzacczcJ8crGImjQgqLhvI1a2SXUGlQxFDBU5AMZjE1BsGxxdIsAOzJRiuDp8olsa45r9ydHnmcIjKH-8izGmbX0Um0P3301kmAiMRa0toxFj_pGSVbhOKoBFp1tSYSNbHUXw620vbRRpbJK-cqFuCwkfD2K3FWaAOA60CoJeIvF1zuxyXBAqfZKFf9hypRLB_rb1Rx9eADVOVfT7XLX9xt3L7E5WbIFZGLB6FQS5Kssrax0pZYqJq1t60Ug-5ij0vBZ1wJUQuIhSsar3UC4VAmdI0Fb8yV--Rihd73uCsjjOyeP3gCRpY2DAwPtuBcAi4kq-nzeW9KdRN9DrmercVeFVaMsgKEzzjVpTgMpztz9aZLPsNdfmTQNb-BCtQ1rnm25hE640RzdQgcJgr2LzQC7OFU7bos2VWkravLU8o-Y-_qWqqtSVMS0cNmLXqOgcvhtX75-s7hjTJdKnspL0G6eNH_BOT_yZqZ7mqh-iY006wlIqkFyDg3RCfjMRYvuiph0b6lgy2dg7p5aRtJpzC91CZyOzSgrjuxwjegAEjmnrCUDGcoF8g6Q4Fr31aeKhgZDZu-EW_OBJvdQl7d2nxTXmRtlTVrUcDSicaqRoJCbo0OPeV7c7TKRewRU4loQEiAIoevmrgB_DjG0Qy_CpFm3C4YmD7RbDQ8_1oTMqqE06bN1h2gZLa14PfJ9nUcy-g0hRhrBrhMvxBw_vdMBZPAom7zOdJlNiRWYFXRUet3rEK9QuciwD11F3wBykOiyXJtJb3ti_SJh-Hos2GL3MneCpDQ2jVAjbLWcfX9sewd-5zzEHZJcCI71pzbJNzTHAXd7sjLyZZg4u-lQsTyfn7pO9Ju-A-tU7qxIeZhq63t0uP7bkuIHzjhyCG1IqJ0bM08cXj1KhP5YrMZXUJNh_Pg2mZwH2fhc78hp21TcsZjcoDFQjndejSv4AxnowJGXl0sGus4vRzIADJUHqm47XdUtJaHv9dZIJTF1EeauYHoYL0eOjMt0lJL60lgH8LAsWK6PHKYSik3qPtpUqt606tw9kpZlVKApD7LCiwUuTWRSeMCzN1yZOXaIE_9HPdHFQywCTl7VX9ztYCackiJSNd-dE0nPQLlhRndLOEwRe6mBtlAo7dByZKu7GQSIsSZ55hrWxsAU3FQhOC-cS7Etw2Iiq6gKcciol2TVcqFa3AMlG5OY4NUdTFt_vaP8mJyzZt1cMxyD6W3GucB-G5T_SVHY062OCL-4tHlKgcSFWtNacbFjA4xA9WYxy03qlfAXfvHAC17RIKL3fFEcr4bTD_AgEspqM-lDBAz6VVg0QypjhhAALaN3D_9XO1nAIBsZqIc6Lt4w8wis7vtS_Hx_CddkLgLkaVew2MaMBICo6LMlWf2Nrx-FXeJaowNBUk9esFK0cVNBtvFp0rVA&prev=RQ37B65C4DD1673A&p=19&pg=140) * Advantest Europe GmbH * Magstadt * October 7 Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS. Responsibilities include simulation, verification, and end-to-end ownership of complex mixed signal ASICs. Requires EE background in analog/full custom design. report probem [### Senior Analog ASIC Design Engineer (m/f/d)](/clickout/0817ea58a072f911?ql=q&sig=3422a357e0af7d86f5d754f8e6fb0fd785af60da&e=Jmz1vHTTy2d2ja5TP8gHJQxKRccXEVZMkuHlJZIr86l80z9PzYg-Qxyv9GngbVD6OhypEkbiyessV6erygrtk9jZAHfOKW2r_WI2OctvdKYLakhry-yeJbFdH2q592urVNsjI0EeEB_31inEgWN3mRZ6DMnTLMYKWrWPgU9GBA0W6bFW1GzdORKucDjpQcU-qwfXcQxYE86EcmZnVbuvNaKsG6ZzZ269uJ96BVGKgOF6atoASzETP1HJz6aA1VfNTFYK8KPOwDmyu9GFv2rTuURJVoWurATcXsnlSOEkqVeAbHX5vwN5CykrXBbjMrKRuWm0Ep2a0qyLSBRXwAXxzHsRyYu_k9n3t1fkc8w_S8BXZqbXnAvkh92zgYTnPxnjnk2Eg4VUCLOiSk10F7U9ZSduWGZwkAck9UIDSU0R6jQ1CKOAU1NB04-6J4v3-HHz7xIyl8jU9Y5fq3DLonswUzqlr1ieTP-oKTNk8B6tPKrllaytHZiuN5TOQ8JMQSVL68z_4o5nvRB7GQU06010D5-DNAsgDSYFMg-mo0soZRrgUBnbsbfuC4mz5AR1_i0PtkX27SPDfqLS9u_T4MfDtLU-SO--PPkej9c5_LYETtCVkot01YZ_wX5gLT3Gwh9wqE-LC2ZxbUhAF1EtYMfoVS67aPerashyekh9_dCGliLX6OeB4rUoJUcrPruaWVzIpC7xOZGYL6W3-6owQFWHisgi3F7Tm_bthkKTImAtrTZNgFmMRi6Udk3kgJlCA-7uhmuAVRkeq7GnssXq-AhWjxCvfwO3ZGx6gIIHKForT5HJr40u5K0irrhyB8k6zOXh7ibv02iGvl5QWfLglgXl1RQv0B2TKVrs_tspxy04Vxa-gGQSjVYLc7sg-FWesjPlyScQClZ-XCvVjIE0tdVIIuZDYTriH79fmZAuwJ4k8fSkIc-d8FFrXDw2R53iW1yG2rYsgSfDLqezWgB3meyiG8aUxWqtihLn6cwJFltl0PpRwGaaS_0pZ65PJziwHuDXXjrgHVd5Tr6gmrxRDikLPUaAUmNpy7En8JsGSbXzBpHob2neCYfwR2XoKJIDlenhzNJ5QFTwMeE8bSG4kNTDmWfXQzEZNYRLtLCrdqirN00o7KEdxYXkxubZbHnkqY7AaRJS13G-aMnP2d0ysP58-SauDMG6vOD3bZqALCDaBdzoyIzyULrWfYCa1HNSKEJAimLdJ8gJDXnMRbZ5ai-QYeYM951pnWBbIYKVv_Ggu6O0SUhoC6tGPS7eXfY0biHPOQeNTJ7VnBknKj9ifNa5llfdn8DxJOSZyl9c74Jp19pL4sJdKrTDYoHcn7lktNx-MyvMDGJmrUlGYAHAHi5BtowMfoVkWy0Io6_p8DPFvXu8O15obGm4vZjiqP5B6WSr_-G8VXJMIT1AjdA0MLMKuDrpjHyIpwK6A8KTOsX_Cqnm37aFF5DC8zin0hAjmw&prev=RQ37B65C4DD1673A&p=20&pg=140) * Advantest Europe GmbH * Schönaich * October 7 Senior Analog ASIC Design Engineer to design and implement analog or full-custom modules in CMOS. Responsibilities include simulation, verification, and end-to-end ownership of complex mixed signal ASICs. Requires EE background in analog/full custom design. report probem Email me future jobs like these → Email me future jobs like these: OK * [«](/jobs/germany?page=139) * [137](/jobs/germany?page=137) * [138](/jobs/germany?page=138) * [139](/jobs/germany?page=139) * 140 * [141](/jobs/germany?page=141) * [142](/jobs/germany?page=142) * [143](/jobs/germany?page=143) * [»](/jobs/germany?page=141) [next page](/jobs/germany?page=141) * [«](/jobs/germany?page=139) * [137](/jobs/germany?page=137) * [138](/jobs/germany?page=138) * [139](/jobs/germany?page=139) * 140 * [141](/jobs/germany?page=141) * [142](/jobs/germany?page=142) * [143](/jobs/germany?page=143) * [»](/jobs/germany?page=141) #### germany in Cities... * 551 ![Munich](/public/img/coa/de.muenchen.png "Coat of arms of Munich") [Munich](/in/muenchen/germany "English jobs in Munich") * 222 ![Frankfurt](/public/img/coa/de.frankfurt-am-main.png "Coat of arms of Frankfurt") [Frankfurt](/in/frankfurt-am-main/germany "English jobs in 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