181 ux german+highway+system+in+berlin English-speaking jobs in Lower Saxony

  • United Offshore Support GmbH
  • Lower Saxony
  • July 18
Fluent English; German is a plus. Why UOS? ... in London and Singapore. ... Headquartered in Leer Germany, UOS has a growing office in Aberdeen and commercial management presence ... Your Impact You will play a key role in ensuring that the right people are in the right place at the ... Ability to manage multiple priorities in a fast-paced environment.
  • Universitätsmedizin Göttingen
  • Göttingen
  • July 15
accordance to the German Public Sector Collective Agreement (TV-L) The UMG is committed to increasing ... a CV, certificates and contact details for at least two references compiled as a single PDF via the system ... We kindly ask you to indicate a disability/equal status in your letter of application in order to safeguard ... We kindly ask you to indicate a disability/equal status in your letter of application in order to safeguard ... vitro and in vivo CRISPR screening approaches.
  • Evotec
  • Göttingen
  • July 10
Evotec as a leader in the field. ... subject matter expertise in oncology In depth experience and practical knowledge of pharmaceutical ... The role operates in a matrix environment, influencing internal and external stakeholders to position ... executing the R&D strategy within the oncology therapeutic area as well as leading strategic partnerships in ... peer-reviewed publications Required Qualifications PhD degree in molecular biology/biochemistry
  • TechBiz Global GmbH
  • Hanover
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Raddestorf
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Celle
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Osnabrück
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Bramsche
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Göttingen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Lingen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Osnabrück
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Bramsche
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Göttingen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Lingen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Hanover
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Celle
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • TechBiz Global GmbH
  • Raddestorf
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
  • Zoomlion
  • Verden an der Aller
  • July 6
Proficiency in MS Office and asset management tools. ... In this role, you will be responsible for strategic planning, budget control, site selection, leasing ... Key Responsibilities: Develop and implement operational procedures for outlets in alignment with corporate ... Qualifications: Proven experience in outlet/retail operations, facility management, or service supervision
  • OKAPI:Orbits GmbH
  • Brunswick
  • June 29
LogoInfluence system architecture, research methodologies, and data integration approaches. ... Your mission Join us in building solutions that keep space safe and sustainable. ... Your tasks and responsibilities In this role, you will contribute to projects that support Europe’s future ... Must‑Have BSc or MSc in Aerospace Engineering, Space Engineering, Applied Physics, Applied Mathematics ... Python, Java, FORTRAN, or a similar language  Interest in satellite safety, conjunction assessment,
  • Universitätsmedizin Göttingen
  • Göttingen
  • July 19
a CV, certificates and contact details for at least two references compiled as a single PDF via the system ... We kindly ask you to indicate a disability/equal status in your letter of application in order to safeguard ... We kindly ask you to indicate a disability/equal status in your letter of application in order to safeguard ... vitro and in vivo CRISPR screening approaches. ... consideration in accordance with the relevant regulations.
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