791 ux german+highway+system+in+berlin English-speaking jobs in North Rhine-Westphalia

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  • TechBiz Global GmbH
  • Leverkusen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Mitte
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Wuppertal
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Rodenkirchen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Aachen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Essen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Münster
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Neuss
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Mitte
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Heinsberg
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Düsseldorf
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Wuppertal
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Warendorf
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Münster
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Paderborn
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Leverkusen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Rodenkirchen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Essen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Bergisch Gladbach
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
  • TechBiz Global GmbH
  • Aachen
  • June 10
Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in
report probem
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