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Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

Development & Implementation Develop and implement test plans and test strategies at silicon, package, and system ... Strong background in post-silicon test optimization and yield analysis. ... Proficiency in RTL and testbench development using SystemVerilog and Verilog. ... Experience in defining and implementing test strategies for high-volume production. ... clients' team Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in

You will become part of a multinational team supporting on System Integration & Verification activities ... days Fluent verbal and written English language skills Advantage Understanding of software and system ... Position Description: CGI is a European leader in Space Ground Segment systems and services in the ... Required qualifications to be successful in this role include: University degree in an engineering field ... In addition, sabbatical or parental leave is supported.

German and/or English, with the ability to understand and adhere to all job requirement and safety guidelines ... In the best-case scenario you can start as soon as possible! Please plan enough time to attend. ... 00, Sat 08:30 to 17:15 * Late shift: Mo-Thu 14:15 to 23:30, Fri 15:00 to 20:30, Sat 08:30 to 17:15 (in ... fulfillment production standards Additional Requirements Candidates must be 18 years or older and proficient in