107 Engineer English-speaking jobs in Saxony
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Senior Staff Digital Verification Engineer (f/m/d)
- Renesas Electronics America
- dresden
- October 1
Lead verification for sensor-focused IC designs in automotive and industrial markets. Build and optimize verification environments, mentor the team, and drive efficient workflows, ensuring high-quality, reusable methods. Requires 10+ years of functional verification expertise.
High-Speed Converters Test and Validation Engineer
- Nokia
- chemnitz
- October 1
Perform hands-on testing and validation of high-speed ADCs and DAC systems. Set up RF test equipment, analyze results, and develop automated test setups using Python. Collaborate with design and ASIC teams to improve test methods.
High-Speed Converters Test and Validation Engineer
- Nokia
- leipzig
- October 1
Perform hands-on testing and validation of high-speed ADCs and DAC systems. Set up RF test equipment, analyze results, and develop automated test setups using Python. Collaborate with design and ASIC teams to improve test methods.
High-Speed Converters Test and Validation Engineer
- Nokia
- dresden
- October 1
Perform hands-on testing and validation of high-speed ADCs and DAC systems. Set up RF test equipment, analyze results, and develop automated test setups using Python. Collaborate with design and ASIC teams to improve test methods.
Salesforce Engineering Manager (m/w/d)
- IU Internationale Hochschule
- Leipzig
- September 24
- remote work
Digital SoC ASIC Physical Implementation Engineer (f/m/div.)
- The BIG Jobsite
- Dresden
- October 1
Develop highly integrated RF SoCs for automotive radar applications. Responsibilities include mixed-signal SoC ASIC implementation, HDL checks, floorplan creation, and sign-off verification like STA and EM. Requires electrical engineering background.
Digital SoC ASIC Physical Implementation Engineer (f/m/div.)
- Robert Bosch
- dresden
- September 19
Develop highly integrated RF SoCs for next-generation automotive radar. Implement mixed-signal ASICs from microcontroller architectures to digital layout, integrating IP blocks and hard macros. Own sign-off verification tasks like STA, EM, and gate-level simulation.

















