5496 turkish germany English-speaking jobs in Germany

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Manage global replenishment planning, ensure optimal stock levels, and monitor material availability. Build, maintain, and improve monthly spare parts forecasts using data analysis and logic-based relationships. Create and maintain dashboards, analyze data, and provide insights to support decision-making. Support NPI processes, drive automation, and optimize workflows.

Manage global replenishment planning, ensure optimal stock levels, and monitor material availability. Build, maintain, and improve monthly spare parts forecasts using data analysis and logic-based relationships. Create and maintain dashboards, analyze data, and provide insights to support decision-making. Support NPI processes, drive automation, and optimize workflows.

Manage global replenishment planning, ensure optimal stock levels, and monitor material availability. Build, maintain, and improve monthly spare parts forecasts using data analysis and logic-based relationships. Create and maintain dashboards, analyze data, and provide insights to support decision-making. Support NPI processes, drive automation, and optimize workflows.

Manage global replenishment planning, ensure optimal stock levels, and monitor material availability. Build, maintain, and improve monthly spare parts forecasts using data analysis and logic-based relationships. Create and maintain dashboards, analyze data, and provide insights to support decision-making. Support NPI processes, drive automation, and optimize workflows.

Senior Account Executive will build and scale the sales operation for Talentir's Autonomous Payout Operating System. Responsibilities include closing enterprise deals ranging from $20M to $1B+ in annual payout volume, running full-cycle sales, and navigating multi-stakeholder buying committees.

Senior Digital ASIC Design Engineer responsible for requirements gathering, architecture development, RTL coding, module and chip level verification, and documentation. Requires a university degree in EE, experience in digital design, ASIC design methodologies, and RTL coding (Verilog).

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and collaboration with cross-functional teams.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Backend Engineer to design, develop, test, deploy, and maintain software in a microservice architecture predominantly written in Java 8 and Kotlin using Spring Boot.

NDT Inspector required for aircraft maintenance (Part-145). Must have completed qualification as an inspector in non-destructive testing according to EN4179/NAS410 in at least one of the following: ultrasonic, eddy current, or radiography testing. Experience with NDT inspections on aircraft and documentation of test results is required.