25 SAP SD germany English-speaking jobs in Erlangen

Erlangen, Bavaria, Germany.Solution Architect (m/f/d)- Connectivity ArchitectureNuremberg, Bavaria, Germany ... Network Related Services (m/w/d)Cloud-Architect IoT/ Industrie 4.0 (all genders)Nuremberg, Bavaria, Germany ... Professional Data-Architect (m/w/d)(Senior) IT Cloud Architekt /Banking (all genders)Nuremberg, Bavaria, Germany

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste

Your Tasks Integrated hardware accelerators for machine learning in RISC-V subsystems Hardware and hardware-related software for methods and strategies for battery-powered IoT nodes with an optimized RISC-V processor subsystem for ultra-low power consumption Hard- and software co-optimized architectures and strategies for high-performance, energy-efficient hardware accelerators, as well as a Syste