332 Engineer English-speaking jobs in Munich
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(Senior) Kotlin / Java Software Engineer - Banking Payments (m/f/x)
- Scalable Capital
- Munich
- October 24
Junior Kotlin / Java Software Engineer - Clearing & Settlement (m/f/x)
- Scalable GmbH
- Munich
- October 13
ATE Test Engineer - Teradyne J750 Semiconductor (all gender)
- ALTEN
- Munich
- October 21
Senior Wording Intelligence Specialist (m/f/x/d)
- Swiss Re
- Munich
- October 27
ASIC Digital Design Engineer (f/m/div.)
- Robert Bosch
- münchen
- October 30
Drive digital design for advanced Mixed-Signal and SoC ASICs for MEMS consumer sensors. Define concepts, derive requirements, and integrate architectures optimizing area and power. Requires 5+ years of IC digital design experience and strong VHDL/Verilog knowledge.
Forward Deployed Operator - Hardware Engineering
- Onodrim Industries
- Munich
- November 9
FPGA / Mixed-Signal Design Engineer (m/f/d)
- Amoria Bond
- münchen
- October 21
Develop cutting-edge FPGA solutions for high-performance, real-time systems. Own the full development lifecycle from architecture to hardware integration, designing digital functions for DSP applications. Requires a degree in a technical field and proficiency in VHDL, Verilog, or SystemVerilog.
(Senior) Principal Device Engineer - GaN Power Devices (m/f/d)
- Nexperia
- münchen
- October 15
Lead the architecture, modeling, and optimization of GaN power devices. Drive TCAD-driven design, balancing performance, reliability, and manufacturability. Requires expertise in GaN/wide bandgap device development and device physics.
Senior Digital Design Verification Engineer (d/m/f)
- Albelissa
- münchen
- November 7
Drives verification strategy for digital and mixed-signal IPs, shaping testbench architecture and plans. Applies UVM and Formal Verification to build scalable environments. Mentors junior engineers and communicates project status.
Cad Engineer / Electronic Design - Munich (M/F/D) - For German Resident Only
- Micron Technology Inc
- Munich
- October 14
Technical Deployment Lead
- Anthropic
- Munich
- November 7
- visa sponsorship
Senior Staff Interface IP Verification Engineer (Pre-Silicon-PCIe/CXL/DDR/Ethernet)
- ANSYS
- münchen
- November 4
Lead pre-silicon verification of Interface IP (PCIe, CXL, DDR, Ethernet) at Synopsys. Build UVM-based testbenches and drive end-to-end verification from architecture reviews to silicon signoff. Requires 8+ years of ASIC/SoC verification experience.






























































