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Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Business Solution Architect Core - Energy Retail will lead architecture discussions for Core Platforms (CRM, Billing etc.) and collaborate with stakeholders to translate business requirements into technical designs.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

The Antenna Chief Engineer leads the product journey for Active Antenna Systems, from concept to lifecycle management. This role drives system architecture, including array geometry, beamforming, and spatial radiation performance. The Chief Engineer aligns and leads multidisciplinary engineering functions, ensuring compliance with industry standards.

DevOps Engineer to build, integrate, and evolve a Kubernetes-based Application Tier for research applications. Experience with Kubernetes, Terraform, Helm, and cloud networking is required.

Senior Account Executive will build and scale the sales operation for Talentir's Autonomous Payout Operating System. Responsibilities include closing enterprise deals ranging from $20M to $1B+ in annual payout volume, running full-cycle sales, and navigating multi-stakeholder buying committees.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and collaboration with cross-functional teams.