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We are looking for individuals who want to join our Team in Stuttgart, Germany. Apply now! ... Job Opening :  IACS Registrar Location : Panzer Kaserne Boeblingen, Germany – On-Site Start Date : Immediate

We are looking for individuals who want to join our Team in Stuttgart, Germany. Apply now! ... Job Opening :  IACS Registrar Location : Kelly Barracks, Stuttgart, Germany – On-Site Start Date : Immediate

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Global Data Architect needed to shape a harmonized business architecture for Advantest. Develop and maintain a scalable, integrated architecture, focusing on data model and data integration. Support transformation projects and mentor business users on data ownership.

Operational Supplier Manager responsible for material planning, supplier coordination, and inventory management. Manages supply plans, coordinates with suppliers and contract manufacturers, and resolves material risks and shortages. Requires experience in material planning, supply planning, procurement coordination, or inventory management within an outsourced manufacturing environment.

Designs and maintains enterprise AWS infrastructure architectures, including account structures, networking, compute, storage, and databases. Defines and enforces AWS infrastructure standards and guardrails, ensuring security, compliance, and cost optimization. Acts as an AWS infrastructure advisor for application, DevOps, and operations teams.

Senior Digital ASIC Design Engineer responsible for architecture development, RTL coding, and verification of digital modules and subsystems. Collaborates with system architects and design engineers on complex mixed signal ASICs used in semiconductor testing.

Senior ASIC Post-Silicon Validation Engineer will develop and align test plans and test solutions for ASICs designed for the Advantest V93000 Semiconductor Test System. Responsibilities include testing and characterizing functionality and performance of ASICs, scoping, designing, and ensuring the technical validity of test solutions, and collaborating with chip design engineers, software engineers, and other engineering disciplines.

The Commodity Manager - Contract Manufacturer HLA is responsible for managing the contract manufacturer's "Higher Level Assemblies" commodity. They develop and implement commodity strategies, monitor market trends, and assess risk factors.

Expert Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include architecture development, RTL coding, verification, and mentoring junior engineers.

The Commodity Manager - Printed Circuit Board is responsible for developing and implementing commodity strategies to ensure the availability of high-quality printed circuit boards at the best prices. They monitor market trends, assess risk factors, and identify opportunities for cost reduction or improvement in supply chain efficiency.

Strategic Supplier Manager - Contract Manufacturer HLA will govern supplier relationships, define strategies, lead contract negotiations, and drive value creation. Requires a degree in a related field and 5+ years of experience in supplier management, sourcing, or procurement.

Senior Digital ASIC Design Engineer will develop and design digital modules and subsystems for semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and collaboration with cross-functional teams.

Project Manager ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include translating requirements into robust designs, solving technical problems, and delivering high-quality results on schedule.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test pattern generation. Requires experience in Design for Test, BIST, and standard simulation tools.

Senior Digital ASIC Design Engineer Verification will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Define and own ECAD library architecture, including data models, classification schemes, and naming conventions. Establish global library standards and governance rules. Architect and optimize integration between ECAD tools and surrounding systems.

Engineer for Digital Engineering will support the implementation and operation of Digital Engineering capabilities. Responsibilities include contributing to cross-functional collaboration, supporting pilots and improvement initiatives, and analyzing engineering workflows. Qualifications require a university degree in a technical discipline, several years of experience in engineering environments, and experience with digital tools and processes.

Hardware Test Laboratory Manager will establish and lead a team, define and improve test strategies, plan and execute hardware and system level tests, and ensure compliance with quality standards.