1047 English-speaking jobs in Baden-Württemberg

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

R&D Software Engineer to design and develop software for the IC Tester Platform Maintenance Framework. Requires C++ experience, understanding of software architecture, and ability to solve technical problems in an agile team.

Logistics employee role involving unloading, lifting, scanning, and sorting products. Requires ability to stand/walk for long periods and lift up to 15kg. Basic German or English proficiency is needed.

Warehouse employee role involving unloading, lifting, scanning, and sorting products. Requires ability to stand/walk for long periods and lift up to 15kg. Basic German or English proficiency is needed.

Global Quality Director for Plates is sought to join XSYS, a leading provider of photopolymer printing plates and related technologies. The role supports the company's global operations across its production facilities.

Student internship in Human-Computer Interaction and Eye Tracking. Work alongside colleagues to contribute to innovation in a modern setting.

MLOps Engineer implements CI/CD pipelines and automated testing for AI/ML workloads. Responsibilities include building model registries, maintaining model serving, and configuring observability using tools like Prometheus and Grafana. Requires 3-5 years in DevOps or ML engineering with Python and cloud experience.

PAS Developer translates product vision into scalable technical solutions. Designs and implements modular, production-grade tooling, integrating systems like MES and data pipelines. Requires a technical degree and strong experience in scalable industrial software.