695 English-speaking jobs in Baden-Württemberg

Shape Advantest's global architecture, focusing on harmonized business processes and trusted data. Responsible for product/part and Supply Chain data structures, developing scalable, integrated models, and improving data governance.

Senior ASIC Design Engineer DfT role involves creating next-gen semiconductor testing technologies. Responsibilities include RTL coding, design for test, and memory BIST implementation for complex mixed signal ASICs. Requires 5+ years in DfT/BIST with Verilog/System Verilog experience.

Define and own ECAD library architecture, establishing global standards and governance. Architect integrations between ECAD tools and systems. Requires engineering education and strong ECAD experience, including Siemens Xpedition.

Configuration Management Engineer to record status, create baselines, and enhance CM tooling. Requires IT degree, CM knowledge, Linux/Python scripting, and experience with Git/Jira.

Senior Digital ASIC Design Engineer Verification develops and verifies complex mixed signal ASICs for semiconductor testing. Responsibilities include RTL coding in Verilog/System-Verilog, chip-level verification, and architecture development. Requires a relevant degree and digital design experience.

Configuration Management Engineer to record status, audit baselines, and enhance CM tooling. Requires IT degree, CM knowledge, Linux/Python scripting, and experience with Git/Jira.

Senior ASIC Design Engineer DfT role involves creating next-gen semiconductor testing technologies. Responsibilities include RTL coding, design for test, and memory BIST implementation for complex mixed signal ASICs. Requires 5+ years in DfT/BIST with Verilog/System Verilog experience.

Supply Network Designer supports supply chain network design and optimization using data-driven analysis and scenario modeling. The role develops network models to evaluate configuration options, cost, service, and risk implications.

Senior Digital ASIC Design Engineer Verification develops and verifies complex mixed signal ASICs for semiconductor testing. Responsibilities include RTL coding in Verilog/System-Verilog and chip-level verification. Requires a degree in EE and digital design background.

Define and maintain standardized Supplier Data Specifications. Lead gap analysis of existing data flows. Manage supplier relationships to drive data quality and adherence to standards. Requires 7-10 years in supplier data governance.

Senior ASIC Design Engineer DfT role involves creating next-gen semiconductor testing technologies. Responsibilities include RTL coding, design for test, and memory BIST implementation for complex mixed signal ASICs. Requires 5+ years in DfT/BIST with Verilog/System Verilog experience.

Develop test solutions for high-speed digital, analog, RF, and power ICs. Test and characterize ASICs. Requires BS in Electrical Engineering/Physics/CS with 5+ years semiconductor test experience, Java, Python, and ML knowledge.

R&D Engineer Software & Hardware develops and owns methods for testing and verifying high-end digital hardware. This role requires C++ skills, understanding of digital hardware, and data-driven problem-solving.

Support Digital Engineering implementation and operation. Contribute to cross-functional collaboration, analyzing workflows for efficiency. Requires a technical degree and experience with digital tools and PLM concepts.

Join Advantest's 18-month Graduate Program as an Application Engineer. Develop test solutions for semiconductors, gaining expertise in ATE systems, hardware, and software. Requires a relevant degree and English fluency.

Design and improve end-to-end inventory management processes for Raw Material, WIP, and FGI inventory. Define KPIs, analyze data, and ensure compliance. Requires supply chain/inventory experience and data analysis skills.

Define and own ECAD library architecture, establishing global standards and governance. Architect integrations between ECAD tools and systems. Requires engineering education and strong ECAD experience, including Siemens Xpedition.

Strategic Supplier Manager for Contract Manufacturer HLA. Own end-to-end supplier relationships, drive value through governance and commercial leadership, and manage performance and risk. Requires 5+ years in strategic supplier management.

Project Manager ASIC Design oversees complex Digital ASIC projects from design to manufacturing. Responsibilities include leading teams, coordinating cross-functional partners, and executing operational plans. Requires EE degree and ASIC design expertise.

Supply Network Designer supports supply chain network design and optimization using data-driven analysis and scenario modeling. The role develops network models to evaluate configuration options, cost, service, and risk.