864 English-speaking jobs in Baden-Württemberg

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

This role balances supply, inventory, capacity, and risk in external manufacturing. The planner translates demand into feasible supply plans, manages inventory targets, and supports S&OP through data-driven decision-making.

Internship in Software Engineering & Agentic Systems for Digital Twins. Develop C++ software components, design APIs, and build CI/CD workflows. Focus on testing, automation, and exploring agentic workflows.