865 English-speaking jobs in Baden-Württemberg

Project Manager ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include translating requirements into robust designs, solving technical problems, and delivering high-quality results on schedule.

Drive sales growth for Hologic's Cervical Health portfolio in South West Germany. Manage sales targets, build key accounts, and promote the Hologic brand. Requires experience selling diagnostic products, understanding the sales cycle, and achieving sales targets. Proven success in customer relationship management and driving new business opportunities.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Evaluates and qualifies global supplier network for scalability, cost-efficiency, and sustainability. Collaborates with suppliers to improve processes, risk management, and production networks. Implements measures to reduce supplier risk and ensure supply chain compliance.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Project Manager for ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include project planning, risk management, status reporting, and collaboration with chip design, software, and external partners.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.

Senior Digital ASIC Design Engineer responsible for requirements gathering, IP architecture development, RTL coding, module and chip level verification, and documentation. Requires a university degree in EE, experience in digital design, ASIC design methodologies, and Verilog.

Senior Digital ASIC Design Engineer Verification will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Lead the expansion of Stranger Soccer's football experience platform in Stuttgart. Operate a full football ecosystem, manage operations, marketing, and team hiring. Strong local insight and entrepreneurial mindset required.

HHL Leipzig Graduate School of Management seeks a research-oriented professor to strengthen its profile in technological transformation and entrepreneurship. The successful candidate will demonstrate a history of high-impact publications, teaching excellence, and knowledge transfer activities.

Senior Digital ASIC Design Engineer responsible for requirements gathering, architecture development, RTL coding, module and chip level verification, and documentation. Requires a university degree in EE, experience in digital design, ASIC design methodologies, and RTL coding (Verilog).

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior Digital ASIC Design Engineer will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.

Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test structure generation. Requires a BS in Electrical Engineering/Physics/Computer Science and 5+ years of experience in Design for Test and BIST.