454 English-speaking jobs in Baden-Württemberg

Deliver groceries to customers efficiently by e-bike or e-scooter. Maintain a high level of customer service and consistently meet or exceed delivery targets. Earn at least €13.90 per hour plus tips. Must be at least 18 years old, have a work permit in Germany, and speak English or German.

Deliver groceries to customers efficiently by e-bike or e-scooter. Meet and exceed delivery targets while providing exceptional customer service. Earn at least €13.90 per hour plus tips.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include RTL coding (Verilog), verification, and end-to-end ownership of digital modules. Requires EE background and digital design experience.

Senior Digital ASIC Design Engineer Synthesis role involves creating next-gen semiconductor testing ICs. Responsibilities include RTL coding, constraint generation, synthesis, and analyzing timing/power for complex mixed-signal ASICs.

Expert Digital ASIC Design Engineer to create next-gen semiconductor testing technologies. Responsibilities include architecture development, RTL coding in Verilog, verification, and mentoring junior engineers.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.

Senior ASIC Post-Silicon Validation Engineer develops and aligns test plans for ASICs across analog, RF, power, and high-speed digital. Requires BS in Electrical Engineering/Physics/CS with 5+ years of semiconductor test experience.