290 English-speaking jobs in Baden-Württemberg

  • Advantest Europe GmbH
  • Böblingen
  • April 1
Senior Digital ASIC Design Engineer responsible for requirements gathering, IP architecture development, RTL coding, module and chip level verification, and documentation. Requires a university degree in EE, experience in digital design, ASIC design methodologies, and Verilog.
  • Advantest Europe GmbH
  • Böblingen
  • April 1
Senior Digital ASIC Design Engineer responsible for requirements gathering, IP architecture development, RTL coding, module and chip level verification, and documentation. Requires a university degree in EE, experience in digital design, ASIC design methodologies, and Verilog.
  • Advantest Europe GmbH
  • Sindelfingen
  • April 1
Senior Digital ASIC Design Engineer Verification will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.
  • Advantest Europe GmbH
  • Schönaich
  • April 1
Project Manager ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include translating requirements into robust designs, solving technical problems, and delivering high-quality results on schedule.
  • Advantest Europe GmbH
  • Böblingen
  • April 1
Senior Digital ASIC Design Engineer will develop and design digital modules and subsystems for semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and collaboration with cross-functional teams.
  • Advantest Europe GmbH
  • Böblingen
  • April 1
Project Manager ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include translating requirements into robust designs, solving technical problems, and delivering high-quality results on schedule.
  • Stryker
  • Freiburg
  • April 1
Internship in R&D for a globally leading medical technology company. Develop prototypes for a surgical navigation system using C++, Python, and/or Matlab. Contribute to a state-of-the-art navigation and imaging system applying machine learning, geometric algorithms, and knowledge representation.
  • N26 GmbH
  • Heidelberg
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Baden-Baden
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Ulm
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Stuttgart
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Pforzheim
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Karlsruhe
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Heilbronn
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • N26 GmbH
  • Mannheim
  • April 1
Senior Backend Engineer to design, develop, test, and maintain software in a JVM language and Spring Boot. Experience with microservice architecture, relational and non-relational databases, and AWS is required.
  • Advantest Europe GmbH
  • Böblingen
  • April 1
LogoConduct comprehensive feature audits of software development processes, ensuring compliance with policies, standards, and best practices. Analyze audit findings, identify process improvement opportunities, and coach teams on software engineering practices. Support problem-solving methods and contribute to quality improvement initiatives.
  • Robert-Bosch-Krankenhaus GmbH
  • Stuttgart
  • April 1
The Dr. Margarete Fischer-Bosch Institute of Clinical Pharmacology seeks a Post Doctoral Research Scientist to analyze multi-omics data, particularly spatial transcriptomics and single-cell RNA sequencing, to elucidate the tumor microenvironment and its influence on cancer progression.
  • Advantest Europe GmbH
  • Böblingen
  • March 31
Senior ASIC Design Engineer will develop digital modules and subsystems for semiconductor testing. Responsibilities include design, RTL coding, verification, and test pattern generation. Requires experience in Design for Test, BIST, and standard simulation tools.
  • Advantest Europe GmbH
  • Böblingen
  • March 31
Project Manager ASIC post-silicon validation will lead a team of engineers to validate and characterize key technologies for semiconductor testing. Responsibilities include translating requirements into robust designs, solving technical problems, and delivering high-quality results on schedule.
  • Advantest Europe GmbH
  • Böblingen
  • March 31
Senior Digital ASIC Design Engineer Verification will develop and verify digital modules and subsystems for Advantest's semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, and verification at the module and chip level.
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