898 English-speaking jobs in Baden-Württemberg

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include RTL coding, verification, constraint generation, synthesis, and collaboration with design partners. Requires a university degree in Electrical Engineering, experience with ASIC design methodologies, and proficiency in Verilog and System Verilog.

Expert Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and mentoring junior engineers. Requires a university degree in Electrical Engineering, expertise in digital design, ASIC methodologies, and RTL coding (Verilog).

Design and implement analog or full-custom modules in CMOS for Advantest's industry-leading semiconductor testers. Collaborate with architects, digital design counterparts, and other engineering disciplines.

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include RTL coding, verification, constraint generation, synthesis, and collaboration with design partners. Requires a university degree in Electrical Engineering, experience with ASIC design methodologies, and proficiency in Verilog and System Verilog.

Senior ASIC Post-Silicon Validation Engineer will develop and align test plans and test solutions for ASICs designed for the Advantest V93000 Semiconductor Test System. Responsibilities include testing and characterizing functionality and performance of ASICs, scoping, designing, and ensuring the technical validity of test solutions, and supporting production implementation.

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include RTL coding, verification, constraint generation, synthesis, and collaboration with design partners. Requires a university degree in Electrical Engineering, experience with ASIC design methodologies, and proficiency in Verilog and System Verilog.

Senior ASIC Post-Silicon Validation Engineer will develop and align test plans and test solutions for ASICs designed for the Advantest V93000 Semiconductor Test System. Responsibilities include testing and characterizing functionality and performance of ASICs, scoping, designing, and ensuring the technical validity of test solutions, and supporting production implementation.

Expert Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and mentoring junior engineers. Requires a university degree in Electrical Engineering, expertise in digital design, ASIC methodologies, and RTL coding (Verilog).

Design and implement analog or full-custom modules in CMOS for Advantest's industry-leading semiconductor testers. Collaborate with architects, digital design counterparts, and other engineering disciplines.

Expert Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include requirements gathering, architecture development, RTL coding, verification, and mentoring junior engineers. Requires a university degree in Electrical Engineering, expertise in digital design, ASIC methodologies, and RTL coding (Verilog).

Design and implement analog or full-custom modules in CMOS for Advantest's industry-leading semiconductor testers. Collaborate with architects, digital design counterparts, and other engineering disciplines.

Design and implement analog or full-custom modules in CMOS for Advantest's industry-leading semiconductor testers. Collaborate with architects, digital design counterparts, and other engineering disciplines.

Design and implement analog or full-custom modules in CMOS for Advantest's industry-leading semiconductor testers. Collaborate with architects, digital design counterparts, and other engineering disciplines.

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include RTL coding, verification, constraint generation, synthesis, and collaboration with design partners. Requires a university degree in Electrical Engineering, experience with ASIC design methodologies, and proficiency in Verilog and System Verilog.

Senior ASIC Post-Silicon Validation Engineer will develop and align test plans and test solutions for ASICs designed for the Advantest V93000 Semiconductor Test System. Responsibilities include testing and characterizing functionality and performance of ASICs, scoping, designing, and ensuring the technical validity of test solutions, and supporting production implementation.

Senior Digital ASIC Design Engineer will develop and implement digital modules and subsystems for semiconductor testing solutions. Responsibilities include RTL coding, verification, constraint generation, synthesis, and collaboration with design partners. Requires a university degree in Electrical Engineering, experience with ASIC design methodologies, and proficiency in Verilog and System Verilog.

Zeppelin University seeks a Junior or Full Professor in Industrial and Organizational Psychology to teach in BA and MA programs and conduct research. Applicants should demonstrate expertise in the field, strong research achievements, and a commitment to teaching.

Designs and maintains enterprise AWS infrastructure architectures, including account structures, networking, compute, storage, and databases. Defines and enforces AWS infrastructure standards and guardrails, ensuring security, compliance, and cost optimization. Acts as an AWS infrastructure advisor for application, DevOps, and operations teams. Requires 10+ years of experience in IT infrastructure and/or cloud architecture, with proven experience designing and operating enterprise-scale AWS environments.

Lead strategic Windchill PLM system deployments and upgrades, optimizing workflows and processes. Collaborate cross-functionally to ensure seamless integration and provide training and support. Extensive Windchill expertise, process optimization knowledge, and cross-functional leadership skills required.

Zeppelin University seeks a Junior Professor (tenure track) or Full Professor in Industrial and Organizational Psychology. The successful candidate will teach courses in the BA and MA programs and design and deliver modules. Applicants for a Junior Professorship should demonstrate research potential, while Full Professor applicants should possess broad expertise and research achievements.