55 English-speaking jobs in Aachen

At eBay, we're more than a global ecommerce leader — we're changing the way the world shops and sells. Our platform empowers millions of buyers and sellers in more than 190 markets around the world. We're committed to pushing boundaries and leaving our mark as we reinvent the future of ecommerce for enthusiasts.

Analog/RF/High-Speed IC Design Engineer to support design and validation of broadband mixed-signal IC blocks for next-gen systems. Requires PhD in IC design, solid analog foundation, and experience with RF/high-speed circuits.

Internship or Master Thesis in Battery Analytics. Explore large BESS datasets to find trends and patterns. Use Python and AI tools to turn analysis into actionable visuals. Requires a technical degree and interest in lithium-ion batteries.

Administer, expand, and optimize Linux (laptops/servers) and Kubernetes platforms. Responsibilities include troubleshooting, documentation, and Jira support. Requires STEM/IT background with Linux/Kubernetes and scripting experience.

Senior Director IT to build and lead the IT organization and technology foundation. Responsibilities include enterprise IT, cybersecurity, data, AI, and architecture strategy. Requires proven senior IT leadership in high-tech environments.

Support the EMEA commercial organization by managing the sales process from PO receipt through invoicing and revenue recognition. Coordinate with Sales, Finance, and Logistics to ensure accurate order processing and timely fulfillment.

Drive growth for Hexagon Mining in Europe by identifying and developing new business opportunities. This customer-facing role requires strong B2B sales skills, technical understanding of mining solutions, and experience managing complex sales cycles.

Associate Consultant in Cost and Value Management performs cost analysis of technical products and components. Key tasks include cost evaluations for target costing and identifying cost reduction potentials. Requires an engineering degree and strong Excel/PowerPoint skills.

Fullstack Developer role focusing on customer experience. Develop REST/event-based services using Java, with frontend work in Vue.js or Angular. Experience with cloud infrastructure and Agile methods is required.

Experienced Process Integration Engineer needed to develop stable, scalable process integration solutions for integrated graphene photonics and high-speed optical chip interconnect interconnect. Requires MSc/PhD and 7+ years in semiconductor fab process integration.

Own electrical characterization and co-design of advanced packages. Drive package-level electrical signoff by developing equivalent circuit models and leading SI/PI analysis for high-speed interconnect requirements.

Lead tool installation and reliability planning for wet cleaning in a cleanroom facility. Responsibilities include equipment planning, integration, and supporting yield improvement. Requires 5+ years of wet cleaning experience in semiconductor manufacturing.

Own the hardware architecture of a next-gen hybrid compute engine combining electronic and photonic compute. Define compute architecture, memory hierarchy, and data fabric, bridging compute, heterogeneous system design, and electronic-photonic co-design.

Lead Plating Process Engineer for next-gen materials like graphene. Oversee fab startup, tool qualification, and process ramp-up for advanced plating processes. Requires 5+ years in semiconductor plating engineering.

Senior Wet Cleaning Process Engineer to lead wet clean process development and scaling for Black FabONE. Focus on 2D material preparation, tool validation, and establishing Process of Record. Requires 5+ years in semiconductor process engineering.

Own the complete tape-out flow for Electronic-Photonics ICs, managing GDS integration, mask data preparation, and DfX co-integration on a 300mm platform. Requires expertise in GDSII, DRC/LVS/ERC, and production flows.

Senior High-Speed Analog/RF System Architect to own SerDes architecture for graphene photonic interconnect SoCs. Define electrical architecture for PLL, TIAs, drivers, equalizers, ADC/DACs, and CDR, targeting 112G/224G+ PAM4.

Oversee ASIC programs combining electronics and photonics in advanced chiplet packages. Lead cross-functional teams, manage the silicon cycle from concept to release, and coordinate external IP providers to meet technical and schedule targets.

Execute product qualification activities, turning plans into test setups and traceable evidence for product release. Develop test hardware, run bench/lab tests (thermal, electrical, mechanical), and coordinate campaigns with external partners.

Design, simulate, and validate high-speed analog transmitter and receiver circuits for next-generation Optical Compute Interconnect products. Develop power-efficient analog front ends interfacing with integrated photonic devices.